mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-22 09:29:31 +00:00
ab5a55e118
x86 addressing modes. This allows PIE-based TLS offsets to fit directly into an addressing mode immediate offset, which is the last remaining code quality issue from PR12380. With this patch, that PR is completely fixed. To understand why this patch is correct to match these offsets into addressing mode immediates, break it down by cases: 1) 32-bit is trivially correct, and unmodified here. 2) 64-bit non-small mode is unchanged and never matches. 3) 64-bit small PIC code which is RIP-relative is handled specially in the match to try to fit RIP into the base register. If it fails, it now early exits. This behavior is unchanged by the patch. 4) 64-bit small non-PIC code which is not RIP-relative continues to work as it did before. The reason these immediates are safe is because the ABI ensures they fit in small mode. This behavior is unchanged. 5) 64-bit small PIC code which is *not* using RIP-relative addressing. This is the only case changed by the patch, and the primary place you see it is in TLS, either the win64 section offset TLS or Linux local-exec TLS model in a PIC compilation. Here the ABI again ensures that the immediates fit because we are in small mode, and any other operations required due to the PIC relocation model have been handled externally to the Wrapper node (extra loads etc are made around the wrapper node in ISelLowering). I've tested this as much as I can comparing it with GCC's output, and everything appears safe. I discussed this with Anton and it made sense to him at least at face value. That said, if there are issues with PIC code after this patch, yell and we can revert it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154304 91177308-0d34-0410-b5e6-96231b3b80d8
330 lines
8.3 KiB
LLVM
330 lines
8.3 KiB
LLVM
; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32_LINUX %s
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; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s
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; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 | FileCheck -check-prefix=X32_WIN %s
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; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s
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@i1 = thread_local global i32 15
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@i2 = external thread_local global i32
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@i3 = internal thread_local global i32 15
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@i4 = hidden thread_local global i32 15
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@i5 = external hidden thread_local global i32
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@s1 = thread_local global i16 15
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@b1 = thread_local global i8 0
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define i32 @f1() {
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; X32_LINUX: f1:
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; X32_LINUX: movl %gs:i1@NTPOFF, %eax
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; X32_LINUX-NEXT: ret
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; X64_LINUX: f1:
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; X64_LINUX: movl %fs:i1@TPOFF, %eax
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; X64_LINUX-NEXT: ret
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; X32_WIN: f1:
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; X32_WIN: movl __tls_index, %eax
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; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
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; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
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; X32_WIN-NEXT: movl _i1@SECREL(%eax), %eax
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; X32_WIN-NEXT: ret
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; X64_WIN: f1:
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; X64_WIN: movl _tls_index(%rip), %eax
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; X64_WIN-NEXT: movq %gs:88, %rcx
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; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
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; X64_WIN-NEXT: movl i1@SECREL(%rax), %eax
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; X64_WIN-NEXT: ret
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entry:
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%tmp1 = load i32* @i1
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ret i32 %tmp1
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}
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define i32* @f2() {
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; X32_LINUX: f2:
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; X32_LINUX: movl %gs:0, %eax
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; X32_LINUX-NEXT: leal i1@NTPOFF(%eax), %eax
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; X32_LINUX-NEXT: ret
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; X64_LINUX: f2:
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; X64_LINUX: movq %fs:0, %rax
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; X64_LINUX-NEXT: leaq i1@TPOFF(%rax), %rax
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; X64_LINUX-NEXT: ret
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; X32_WIN: f2:
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; X32_WIN: movl __tls_index, %eax
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; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
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; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
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; X32_WIN-NEXT: leal _i1@SECREL(%eax), %eax
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; X32_WIN-NEXT: ret
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; X64_WIN: f2:
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; X64_WIN: movl _tls_index(%rip), %eax
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; X64_WIN-NEXT: movq %gs:88, %rcx
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; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
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; X64_WIN-NEXT: leaq i1@SECREL(%rax), %rax
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; X64_WIN-NEXT: ret
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entry:
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ret i32* @i1
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}
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define i32 @f3() nounwind {
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; X32_LINUX: f3:
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; X32_LINUX: movl i2@INDNTPOFF, %eax
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; X32_LINUX-NEXT: movl %gs:(%eax), %eax
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; X32_LINUX-NEXT: ret
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; X64_LINUX: f3:
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; X64_LINUX: movq i2@GOTTPOFF(%rip), %rax
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; X64_LINUX-NEXT: movl %fs:(%rax), %eax
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; X64_LINUX-NEXT: ret
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; X32_WIN: f3:
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; X32_WIN: movl __tls_index, %eax
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; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
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; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
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; X32_WIN-NEXT: movl _i2@SECREL(%eax), %eax
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; X32_WIN-NEXT: ret
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; X64_WIN: f3:
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; X64_WIN: movl _tls_index(%rip), %eax
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; X64_WIN-NEXT: movq %gs:88, %rcx
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; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
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; X64_WIN-NEXT: movl i2@SECREL(%rax), %eax
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; X64_WIN-NEXT: ret
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entry:
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%tmp1 = load i32* @i2
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ret i32 %tmp1
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}
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define i32* @f4() {
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; X32_LINUX: f4:
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; X32_LINUX: movl %gs:0, %eax
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; X32_LINUX-NEXT: addl i2@INDNTPOFF, %eax
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; X32_LINUX-NEXT: ret
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; X64_LINUX: f4:
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; X64_LINUX: movq %fs:0, %rax
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; X64_LINUX-NEXT: addq i2@GOTTPOFF(%rip), %rax
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; X64_LINUX-NEXT: ret
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; X32_WIN: f4:
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; X32_WIN: movl __tls_index, %eax
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; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
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; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
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; X32_WIN-NEXT: leal _i2@SECREL(%eax), %eax
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; X32_WIN-NEXT: ret
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; X64_WIN: f4:
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; X64_WIN: movl _tls_index(%rip), %eax
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; X64_WIN-NEXT: movq %gs:88, %rcx
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; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
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; X64_WIN-NEXT: leaq i2@SECREL(%rax), %rax
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; X64_WIN-NEXT: ret
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entry:
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ret i32* @i2
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}
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define i32 @f5() nounwind {
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; X32_LINUX: f5:
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; X32_LINUX: movl %gs:i3@NTPOFF, %eax
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; X32_LINUX-NEXT: ret
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; X64_LINUX: f5:
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; X64_LINUX: movl %fs:i3@TPOFF, %eax
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; X64_LINUX-NEXT: ret
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; X32_WIN: f5:
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; X32_WIN: movl __tls_index, %eax
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; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
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; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
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; X32_WIN-NEXT: movl _i3@SECREL(%eax), %eax
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; X32_WIN-NEXT: ret
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; X64_WIN: f5:
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; X64_WIN: movl _tls_index(%rip), %eax
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; X64_WIN-NEXT: movq %gs:88, %rcx
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; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
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; X64_WIN-NEXT: movl i3@SECREL(%rax), %eax
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; X64_WIN-NEXT: ret
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entry:
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%tmp1 = load i32* @i3
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ret i32 %tmp1
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}
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define i32* @f6() {
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; X32_LINUX: f6:
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; X32_LINUX: movl %gs:0, %eax
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; X32_LINUX-NEXT: leal i3@NTPOFF(%eax), %eax
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; X32_LINUX-NEXT: ret
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; X64_LINUX: f6:
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; X64_LINUX: movq %fs:0, %rax
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; X64_LINUX-NEXT: leaq i3@TPOFF(%rax), %rax
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; X64_LINUX-NEXT: ret
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; X32_WIN: f6:
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; X32_WIN: movl __tls_index, %eax
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; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
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; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
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; X32_WIN-NEXT: leal _i3@SECREL(%eax), %eax
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; X32_WIN-NEXT: ret
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; X64_WIN: f6:
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; X64_WIN: movl _tls_index(%rip), %eax
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; X64_WIN-NEXT: movq %gs:88, %rcx
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; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
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; X64_WIN-NEXT: leaq i3@SECREL(%rax), %rax
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; X64_WIN-NEXT: ret
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entry:
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ret i32* @i3
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}
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define i32 @f7() {
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; X32_LINUX: f7:
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; X32_LINUX: movl %gs:i4@NTPOFF, %eax
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; X32_LINUX-NEXT: ret
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; X64_LINUX: f7:
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; X64_LINUX: movl %fs:i4@TPOFF, %eax
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; X64_LINUX-NEXT: ret
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entry:
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%tmp1 = load i32* @i4
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ret i32 %tmp1
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}
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define i32* @f8() {
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; X32_LINUX: f8:
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; X32_LINUX: movl %gs:0, %eax
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; X32_LINUX-NEXT: leal i4@NTPOFF(%eax), %eax
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; X32_LINUX-NEXT: ret
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; X64_LINUX: f8:
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; X64_LINUX: movq %fs:0, %rax
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; X64_LINUX-NEXT: leaq i4@TPOFF(%rax), %rax
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; X64_LINUX-NEXT: ret
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entry:
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ret i32* @i4
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}
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define i32 @f9() {
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; X32_LINUX: f9:
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; X32_LINUX: movl %gs:i5@NTPOFF, %eax
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; X32_LINUX-NEXT: ret
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; X64_LINUX: f9:
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; X64_LINUX: movl %fs:i5@TPOFF, %eax
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; X64_LINUX-NEXT: ret
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entry:
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%tmp1 = load i32* @i5
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ret i32 %tmp1
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}
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define i32* @f10() {
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; X32_LINUX: f10:
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; X32_LINUX: movl %gs:0, %eax
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; X32_LINUX-NEXT: leal i5@NTPOFF(%eax), %eax
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; X32_LINUX-NEXT: ret
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; X64_LINUX: f10:
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; X64_LINUX: movq %fs:0, %rax
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; X64_LINUX-NEXT: leaq i5@TPOFF(%rax), %rax
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; X64_LINUX-NEXT: ret
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entry:
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ret i32* @i5
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}
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define i16 @f11() {
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; X32_LINUX: f11:
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; X32_LINUX: movzwl %gs:s1@NTPOFF, %eax
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; Why is this kill line here, but no where else?
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; X32_LINUX-NEXT: # kill
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; X32_LINUX-NEXT: ret
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; X64_LINUX: f11:
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; X64_LINUX: movzwl %fs:s1@TPOFF, %eax
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; X64_LINUX-NEXT: # kill
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; X64_LINUX-NEXT: ret
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; X32_WIN: f11:
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; X32_WIN: movl __tls_index, %eax
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; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
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; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
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; X32_WIN-NEXT: movzwl _s1@SECREL(%eax), %eax
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; X32_WIN-NEXT: # kill
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; X32_WIN-NEXT: ret
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; X64_WIN: f11:
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; X64_WIN: movl _tls_index(%rip), %eax
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; X64_WIN-NEXT: movq %gs:88, %rcx
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; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
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; X64_WIN-NEXT: movzwl s1@SECREL(%rax), %eax
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; X64_WIN-NEXT: # kill
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; X64_WIN-NEXT: ret
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entry:
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%tmp1 = load i16* @s1
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ret i16 %tmp1
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}
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define i32 @f12() {
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; X32_LINUX: f12:
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; X32_LINUX: movswl %gs:s1@NTPOFF, %eax
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; X32_LINUX-NEXT: ret
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; X64_LINUX: f12:
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; X64_LINUX: movswl %fs:s1@TPOFF, %eax
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; X64_LINUX-NEXT: ret
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; X32_WIN: f12:
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; X32_WIN: movl __tls_index, %eax
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; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
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; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
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; X32_WIN-NEXT: movswl _s1@SECREL(%eax), %eax
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; X32_WIN-NEXT: ret
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; X64_WIN: f12:
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; X64_WIN: movl _tls_index(%rip), %eax
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; X64_WIN-NEXT: movq %gs:88, %rcx
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; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
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; X64_WIN-NEXT: movswl s1@SECREL(%rax), %eax
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; X64_WIN-NEXT: ret
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entry:
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%tmp1 = load i16* @s1
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%tmp2 = sext i16 %tmp1 to i32
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ret i32 %tmp2
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}
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define i8 @f13() {
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; X32_LINUX: f13:
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; X32_LINUX: movb %gs:b1@NTPOFF, %al
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; X32_LINUX-NEXT: ret
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; X64_LINUX: f13:
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; X64_LINUX: movb %fs:b1@TPOFF, %al
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; X64_LINUX-NEXT: ret
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; X32_WIN: f13:
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; X32_WIN: movl __tls_index, %eax
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; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
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; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
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; X32_WIN-NEXT: movb _b1@SECREL(%eax), %al
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; X32_WIN-NEXT: ret
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; X64_WIN: f13:
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; X64_WIN: movl _tls_index(%rip), %eax
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; X64_WIN-NEXT: movq %gs:88, %rcx
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; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
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; X64_WIN-NEXT: movb b1@SECREL(%rax), %al
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; X64_WIN-NEXT: ret
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entry:
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%tmp1 = load i8* @b1
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ret i8 %tmp1
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}
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define i32 @f14() {
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; X32_LINUX: f14:
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; X32_LINUX: movsbl %gs:b1@NTPOFF, %eax
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; X32_LINUX-NEXT: ret
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; X64_LINUX: f14:
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; X64_LINUX: movsbl %fs:b1@TPOFF, %eax
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; X64_LINUX-NEXT: ret
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; X32_WIN: f14:
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; X32_WIN: movl __tls_index, %eax
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; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
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; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
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; X32_WIN-NEXT: movsbl _b1@SECREL(%eax), %eax
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; X32_WIN-NEXT: ret
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; X64_WIN: f14:
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; X64_WIN: movl _tls_index(%rip), %eax
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; X64_WIN-NEXT: movq %gs:88, %rcx
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; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
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; X64_WIN-NEXT: movsbl b1@SECREL(%rax), %eax
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; X64_WIN-NEXT: ret
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entry:
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%tmp1 = load i8* @b1
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%tmp2 = sext i8 %tmp1 to i32
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ret i32 %tmp2
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}
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