llvm-6502/test/MC/Disassembler/X86
2011-12-29 20:03:14 +00:00
..
dg.exp
enhanced.txt Insert dummy ED table entries for pseudo-instructions. 2011-10-10 18:30:16 +00:00
intel-syntax.txt Fix some Intel syntax disassembly issues with instructions that implicitly use AL/AX/EAX/RAX such as ADD/SUB/ADC/SUBB/XOR/OR/AND/CMP/MOV/TEST. 2011-10-02 21:08:12 +00:00
invalid-VEX-vvvv.txt Add test case for PR10851. 2011-09-14 04:36:54 +00:00
simple-tests.txt Expose FMA3 instructions to the disassembler. 2011-12-29 20:03:14 +00:00
truncated-input.txt
x86-32.txt Add X86 SARX, SHRX, and SHLX instructions. 2011-10-23 22:18:24 +00:00