Jakob Stoklund Olesen 19f5f71bba Revert "Use MachineInstr::readsWritesVirtualRegister to determine if a register is read." ... This reverts r104322. I think it was causing miscompilations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104323 91177308-0d34-0410-b5e6-96231b3b80d8		2010-05-21 17:36:32 +00:00
..
Analysis.h
AsmPrinter.h
BinaryObject.h
CalcSpillWeights.h
CallingConvLower.h
FastISel.h
GCMetadata.h
GCMetadataPrinter.h
GCs.h
GCStrategy.h
IntrinsicLowering.h
ISDOpcodes.h
JITCodeEmitter.h
LatencyPriorityQueue.h
LinkAllAsmWriterComponents.h
LinkAllCodegenComponents.h	Add a hybrid bottom up scheduler that reduce register usage while avoiding	2010-05-20 06:13:19 +00:00
LiveInterval.h	Removed scaleNumbering method declaration from LiveInterval (not defined, not used).	2010-05-21 03:04:04 +00:00
LiveIntervalAnalysis.h
LiveStackAnalysis.h
LiveVariables.h
MachineBasicBlock.h
MachineCodeEmitter.h
MachineCodeInfo.h
MachineConstantPool.h
MachineDominators.h
MachineFrameInfo.h	Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what	2010-05-14 21:14:32 +00:00
MachineFunction.h
MachineFunctionAnalysis.h
MachineFunctionPass.h
MachineInstr.h	Revert "Use MachineInstr::readsWritesVirtualRegister to determine if a register is read."	2010-05-21 17:36:32 +00:00
MachineInstrBuilder.h
MachineJumpTableInfo.h
MachineLocation.h
MachineLoopInfo.h
MachineMemOperand.h
MachineModuleInfo.h
MachineModuleInfoImpls.h
MachineOperand.h
MachinePassRegistry.h
MachineRegisterInfo.h	Add reg_nodbg_iterator	2010-05-15 02:52:58 +00:00
MachineRelocation.h
MachineSSAUpdater.h
MachORelocation.h
ObjectCodeEmitter.h
Passes.h
ProcessImplicitDefs.h
PseudoSourceValue.h
RegAllocRegistry.h
RegisterCoalescer.h
RegisterScavenging.h
RuntimeLibcalls.h
ScheduleDAG.h	Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode.	2010-05-20 23:26:43 +00:00
ScheduleHazardRecognizer.h
SchedulerRegistry.h	Add a hybrid bottom up scheduler that reduce register usage while avoiding	2010-05-20 06:13:19 +00:00
SelectionDAG.h
SelectionDAGISel.h
SelectionDAGNodes.h
SlotIndexes.h
TargetLoweringObjectFileImpl.h	More data/parsing support for tls directives. Add a few more testcases	2010-05-17 22:53:55 +00:00
ValueTypes.h	Fix enum to address array bounds regression.	2010-05-18 21:22:12 +00:00
ValueTypes.td	Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.	2010-05-13 23:55:47 +00:00