Jyotsna Verma 1a35b8e2eb Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181624 91177308-0d34-0410-b5e6-96231b3b80d8		2013-05-10 20:27:34 +00:00
..
Analysis	Fix unchecked uses of DominatorTree in MemoryDependenceAnalysis.	2013-05-06 02:07:24 +00:00
Archive
AsmParser	Add ArrayRef constructor from None, and do the cleanups that this constructor enables	2013-05-05 00:40:33 +00:00
Bitcode	Add ArrayRef constructor from None, and do the cleanups that this constructor enables	2013-05-05 00:40:33 +00:00
CodeGen	DAGCombiner: Generate a correct constant for vector types when folding (xor (and)) into (and (not)).	2013-05-10 14:09:52 +00:00
DebugInfo	libDebugInfo depends on libObject nowadays.	2013-05-09 13:48:26 +00:00
ExecutionEngine	Change getRelocationAdditionalInfo to be ELF only.	2013-05-09 03:39:05 +00:00
IR	Add DebugIR pass -- emits IR file and replace source lines with IR lines in MD	2013-05-08 20:44:14 +00:00
IRReader
Linker
MC	Fix a bug in the MC asm parser evaluating expressions. It was treating:	2013-05-07 21:40:58 +00:00
Object	Change getRelocationAdditionalInfo to be ELF only.	2013-05-09 03:39:05 +00:00
Option
Support	Better output for long help strings for command-line options.	2013-05-10 17:15:51 +00:00
TableGen
Target	Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp.	2013-05-10 20:27:34 +00:00
Transforms	InstCombine: Don't claim to be able to evaluate any shl in a zexted type.	2013-05-10 16:26:37 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile