mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-24 06:30:19 +00:00
5d6365c80c
This is mostly achieved by providing the correct register class manually, because getRegClassFor always returns the GPR*AllRegClass for MVT::i32 and MVT::i64. Also cleanup the code to use the FastEmitInst_* method whenever possible. This makes sure that the operands' register class is properly constrained. For all the remaining cases this adds the missing constrainOperandRegClass calls for each operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216225 91177308-0d34-0410-b5e6-96231b3b80d8
30 lines
854 B
LLVM
30 lines
854 B
LLVM
; RUN: llc -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s
|
|
; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s
|
|
|
|
define i8* @test_frameaddress0() nounwind {
|
|
entry:
|
|
; CHECK-LABEL: test_frameaddress0:
|
|
; CHECK: stp x29, x30, [sp, #-16]!
|
|
; CHECK: mov x29, sp
|
|
; CHECK: mov x0, x29
|
|
; CHECK: ldp x29, x30, [sp], #16
|
|
; CHECK: ret
|
|
%0 = call i8* @llvm.frameaddress(i32 0)
|
|
ret i8* %0
|
|
}
|
|
|
|
define i8* @test_frameaddress2() nounwind {
|
|
entry:
|
|
; CHECK-LABEL: test_frameaddress2:
|
|
; CHECK: stp x29, x30, [sp, #-16]!
|
|
; CHECK: mov x29, sp
|
|
; CHECK: ldr x[[reg:[0-9]+]], [x29]
|
|
; CHECK: ldr x0, [x[[reg]]]
|
|
; CHECK: ldp x29, x30, [sp], #16
|
|
; CHECK: ret
|
|
%0 = call i8* @llvm.frameaddress(i32 2)
|
|
ret i8* %0
|
|
}
|
|
|
|
declare i8* @llvm.frameaddress(i32) nounwind readnone
|