llvm-6502/test/CodeGen/R600/setuo.ll
Tom Stellard 9787e8c76b R600/SI: Add instruction shrinking pass
This pass converts 64-bit instructions to 32-bit when possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213561 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-21 16:55:33 +00:00

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481 B
LLVM

;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck %s
;CHECK-LABEL: @main
;CHECK: V_CMP_U_F32_e32 vcc, {{[sv][0-9]+, v[0-9]+}}
define void @main(float %p) {
main_body:
%c = fcmp une float %p, %p
%r = select i1 %c, float 1.000000e+00, float 0.000000e+00
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %r, float %r, float %r, float %r)
ret void
}
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)