1
0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-29 10:32:47 +00:00
llvm-6502/test/Transforms/MergeFunc/crash.ll
Duncan P. N. Exon Smith 76c17d324c IR: Don't allow non-default visibility on local linkage
Visibilities of `hidden` and `protected` are meaningless for symbols
with local linkage.

  - Change the assembler to reject non-default visibility on symbols
    with local linkage.

  - Change the bitcode reader to auto-upgrade `hidden` and `protected`
    to `default` when the linkage is local.

  - Update LangRef.

<rdar://problem/16141113>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208263 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-07 22:57:20 +00:00

47 lines
1.3 KiB
LLVM

; RUN: opt -mergefunc -disable-output < %s
; PR15185
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128"
target triple = "i386-pc-linux-gnu"
%.qux.2496 = type { i32, %.qux.2497 }
%.qux.2497 = type { i8, i32 }
%.qux.2585 = type { i32, i32, i8* }
@g2 = external unnamed_addr constant [9 x i8], align 1
@g3 = internal unnamed_addr constant [1 x i8*] [i8* bitcast (i8* (%.qux.2585*)* @func35 to i8*)]
define internal i32 @func1(i32* %ptr, { i32, i32 }* nocapture %method) align 2 {
br label %1
; <label>:1
br label %2
; <label>:2
ret i32 undef
}
define internal i32 @func10(%.qux.2496* nocapture %this) align 2 {
%1 = getelementptr inbounds %.qux.2496* %this, i32 0, i32 1, i32 1
%2 = load i32* %1, align 4
ret i32 %2
}
define internal i8* @func29(i32* nocapture %this) align 2 {
ret i8* getelementptr inbounds ([9 x i8]* @g2, i32 0, i32 0)
}
define internal i32* @func33(%.qux.2585* nocapture %this) align 2 {
ret i32* undef
}
define internal i32* @func34(%.qux.2585* nocapture %this) align 2 {
%1 = getelementptr inbounds %.qux.2585* %this, i32 0
ret i32* undef
}
define internal i8* @func35(%.qux.2585* nocapture %this) align 2 {
%1 = getelementptr inbounds %.qux.2585* %this, i32 0, i32 2
%2 = load i8** %1, align 4
ret i8* %2
}