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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15489 91177308-0d34-0410-b5e6-96231b3b80d8
185 lines
6.3 KiB
C++
185 lines
6.3 KiB
C++
//===-- LiveIntervalAnalysis.h - Live Interval Analysis ---------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the LiveInterval analysis pass. Given some numbering of
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// each the machine instructions (in this implemention depth-first order) an
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// interval [i, j) is said to be a live interval for register v if there is no
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// instruction with number j' > j such that v is live at j' abd there is no
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// instruction with number i' < i such that v is live at i'. In this
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// implementation intervals can have holes, i.e. an interval might look like
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// [1,20), [50,65), [1000,1001).
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
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#define LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "LiveInterval.h"
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namespace llvm {
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class LiveVariables;
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class MRegisterInfo;
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class VirtRegMap;
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class LiveIntervals : public MachineFunctionPass {
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MachineFunction* mf_;
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const TargetMachine* tm_;
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const MRegisterInfo* mri_;
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LiveVariables* lv_;
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typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
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Mi2IndexMap mi2iMap_;
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typedef std::vector<MachineInstr*> Index2MiMap;
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Index2MiMap i2miMap_;
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typedef std::map<unsigned, LiveInterval> Reg2IntervalMap;
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Reg2IntervalMap r2iMap_;
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typedef std::map<unsigned, unsigned> Reg2RegMap;
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Reg2RegMap r2rMap_;
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public:
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struct InstrSlots
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{
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enum {
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LOAD = 0,
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USE = 1,
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DEF = 2,
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STORE = 3,
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NUM = 4,
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};
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};
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static unsigned getBaseIndex(unsigned index) {
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return index - (index % InstrSlots::NUM);
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}
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static unsigned getBoundaryIndex(unsigned index) {
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return getBaseIndex(index + InstrSlots::NUM - 1);
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}
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static unsigned getLoadIndex(unsigned index) {
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return getBaseIndex(index) + InstrSlots::LOAD;
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}
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static unsigned getUseIndex(unsigned index) {
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return getBaseIndex(index) + InstrSlots::USE;
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}
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static unsigned getDefIndex(unsigned index) {
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return getBaseIndex(index) + InstrSlots::DEF;
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}
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static unsigned getStoreIndex(unsigned index) {
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return getBaseIndex(index) + InstrSlots::STORE;
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}
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// FIXME: this should really be a const_iterator
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typedef Reg2IntervalMap::iterator iterator;
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iterator begin() { return r2iMap_.begin(); }
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iterator end() { return r2iMap_.end(); }
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unsigned getNumIntervals() const { return r2iMap_.size(); }
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LiveInterval &getInterval(unsigned reg) {
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Reg2IntervalMap::iterator I = r2iMap_.find(reg);
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assert(I != r2iMap_.end() && "Interval does not exist for register");
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return I->second;
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}
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const LiveInterval &getInterval(unsigned reg) const {
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Reg2IntervalMap::const_iterator I = r2iMap_.find(reg);
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assert(I != r2iMap_.end() && "Interval does not exist for register");
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return I->second;
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}
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/// getInstructionIndex - returns the base index of instr
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unsigned getInstructionIndex(MachineInstr* instr) const {
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Mi2IndexMap::const_iterator it = mi2iMap_.find(instr);
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assert(it != mi2iMap_.end() && "Invalid instruction!");
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return it->second;
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}
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/// getInstructionFromIndex - given an index in any slot of an
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/// instruction return a pointer the instruction
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MachineInstr* getInstructionFromIndex(unsigned index) const {
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index /= InstrSlots::NUM; // convert index to vector index
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assert(index < i2miMap_.size() &&
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"index does not correspond to an instruction");
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return i2miMap_[index];
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}
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std::vector<LiveInterval*> addIntervalsForSpills(const LiveInterval& i,
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VirtRegMap& vrm,
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int slot);
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virtual void getAnalysisUsage(AnalysisUsage &AU) const;
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virtual void releaseMemory();
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/// runOnMachineFunction - pass entry point
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virtual bool runOnMachineFunction(MachineFunction&);
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private:
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/// computeIntervals - compute live intervals
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void computeIntervals();
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/// joinIntervals - join compatible live intervals
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void joinIntervals();
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/// joinIntervalsInMachineBB - Join intervals based on move
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/// instructions in the specified basic block.
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void joinIntervalsInMachineBB(MachineBasicBlock *MBB);
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/// handleRegisterDef - update intervals for a register def
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/// (calls handlePhysicalRegisterDef and
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/// handleVirtualRegisterDef)
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void handleRegisterDef(MachineBasicBlock* mbb,
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MachineBasicBlock::iterator mi,
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unsigned reg);
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/// handleVirtualRegisterDef - update intervals for a virtual
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/// register def
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void handleVirtualRegisterDef(MachineBasicBlock* mbb,
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MachineBasicBlock::iterator mi,
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LiveInterval& interval);
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/// handlePhysicalRegisterDef - update intervals for a
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/// physical register def
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void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
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MachineBasicBlock::iterator mi,
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LiveInterval& interval);
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/// Return true if the two specified registers belong to different
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/// register classes. The registers may be either phys or virt regs.
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bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
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bool overlapsAliases(const LiveInterval *lhs,
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const LiveInterval *rhs) const;
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static LiveInterval createInterval(unsigned Reg);
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LiveInterval &getOrCreateInterval(unsigned reg) {
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Reg2IntervalMap::iterator I = r2iMap_.find(reg);
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if (I == r2iMap_.end())
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I = r2iMap_.insert(I, std::make_pair(reg, createInterval(reg)));
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return I->second;
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}
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/// rep - returns the representative of this register
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unsigned rep(unsigned reg) {
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Reg2RegMap::iterator it = r2rMap_.find(reg);
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if (it != r2rMap_.end())
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return it->second = rep(it->second);
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return reg;
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}
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void printRegName(unsigned reg) const;
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};
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} // End llvm namespace
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#endif
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