llvm-6502/test/CodeGen/ARM/fp-arg-shuffle.ll
Cameron Zwarich 4071a71112 Do some peephole optimizations to remove pointless VMOVs from Neon to integer
registers that arise from argument shuffling with the soft float ABI. These
instructions are particularly slow on Cortex A8. This fixes one half of
<rdar://problem/8674845>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128759 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-02 02:40:43 +00:00

12 lines
442 B
LLVM

; RUN: llc < %s -march=arm -mattr=+neon -float-abi=soft | FileCheck %s
; CHECK: function1
; CHECK-NOT: vmov r
define double @function1(double %a, double %b, double %c, double %d, double %e, double %f) nounwind noinline ssp {
entry:
%call = tail call double @function2(double %f, double %e, double %d, double %c, double %b, double %a) nounwind
ret double %call
}
declare double @function2(double, double, double, double, double, double)