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4071a71112
registers that arise from argument shuffling with the soft float ABI. These instructions are particularly slow on Cortex A8. This fixes one half of <rdar://problem/8674845>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128759 91177308-0d34-0410-b5e6-96231b3b80d8
12 lines
442 B
LLVM
12 lines
442 B
LLVM
; RUN: llc < %s -march=arm -mattr=+neon -float-abi=soft | FileCheck %s
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; CHECK: function1
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; CHECK-NOT: vmov r
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define double @function1(double %a, double %b, double %c, double %d, double %e, double %f) nounwind noinline ssp {
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entry:
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%call = tail call double @function2(double %f, double %e, double %d, double %c, double %b, double %a) nounwind
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ret double %call
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}
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declare double @function2(double, double, double, double, double, double)
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