llvm-6502/test/MC/Disassembler
Johnny Chen 1adc40cac3 Cleaned up the for-disassembly-only entries in the arm instruction table so that
the memory barrier variants (other than 'SY' full system domain read and write)
are treated as one instruction with option operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 20:46:17 +00:00
..
arm-tests.txt Cleaned up the for-disassembly-only entries in the arm instruction table so that 2010-08-12 20:46:17 +00:00
dg.exp
neon-tests.txt
simple-tests.txt
thumb-tests.txt