Sanjay Patel 1b10376319 [X86, AVX] fix zero-extending integer operand load patterns to use integer instructions ...

This is a follow-on to r233704 and another partial fix for PR22685:
https://llvm.org/bugs/show_bug.cgi?id=22685



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233724 91177308-0d34-0410-b5e6-96231b3b80d8

2015-03-31 18:43:43 +00:00

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AArch64

AArch64: fix v8.1 sqrdmlah tests on Darwin platforms

2015-03-31 16:41:38 +00:00

ARM

[SDAG] Move TRUNCATE splitting logic into a helper, and use

2015-03-31 10:20:58 +00:00

BPF

[bpf] mark mov instructions as ReMaterializable

2015-03-31 02:49:58 +00:00

CPP

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Generic

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Hexagon

Expand MUX instructions early on Hexagon

2015-03-31 13:35:12 +00:00

Inputs

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Mips

[mips] Support 9-bit offsets for the 'R' inline assembly memory constraint.

2015-03-30 13:27:25 +00:00

MSP430

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NVPTX

[NVPTX] Associate a minimum PTX version for each SM architecture

2015-03-30 19:30:55 +00:00

PowerPC

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R600

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SPARC

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SystemZ

[SystemZ] Support RISBGN instruction on zEC12

2015-03-31 12:58:17 +00:00

Thumb

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Thumb2

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WinEH

[WinEH] Run cleanup handlers when an exception is thrown

2015-03-30 22:58:10 +00:00

X86

[X86, AVX] fix zero-extending integer operand load patterns to use integer instructions

2015-03-31 18:43:43 +00:00

XCore

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