llvm-6502/test/CodeGen/PowerPC/and_sext.ll
Reid Spencer 832254e1c2 Changes to support making the shift instructions be true BinaryOperators.
This feature is needed in order to support shifts of more than 255 bits
on large integer types.  This changes the syntax for llvm assembly to
make shl, ashr and lshr instructions look like a binary operator:
   shl i32 %X, 1
instead of
   shl i32 %X, i8 1
Additionally, this should help a few passes perform additional optimizations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33776 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-02 02:16:23 +00:00

30 lines
869 B
LLVM

; These tests should not contain a sign extend.
; RUN: llvm-as < %s | llc -march=ppc32 &&
; RUN: llvm-as < %s | llc -march=ppc32 | not grep extsh &&
; RUN: llvm-as < %s | llc -march=ppc32 | not grep extsb
define i32 @test1(i32 %mode.0.i.0) {
%tmp.79 = trunc i32 %mode.0.i.0 to i16
%tmp.80 = sext i16 %tmp.79 to i32
%tmp.81 = and i32 %tmp.80, 24
ret i32 %tmp.81
}
define i16 @test2(i16 sext %X, i16 sext %x) sext {
%tmp = sext i16 %X to i32
%tmp1 = sext i16 %x to i32
%tmp2 = add i32 %tmp, %tmp1
%tmp4 = ashr i32 %tmp2, 1
%tmp5 = trunc i32 %tmp4 to i16
%tmp45 = sext i16 %tmp5 to i32
%retval = trunc i32 %tmp45 to i16
ret i16 %retval
}
define i16 @test3(i32 zext %X) sext {
%tmp1 = lshr i32 %X, 16
%tmp2 = trunc i32 %tmp1 to i16
ret i16 %tmp2
}