mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-13 07:29:38 +00:00
99f823f943
This pass is derived from the Hexagon HardwareLoops pass. The only significant enhancement over the Hexagon pass is that PPCCTRLoops will also attempt to delete the replaced add and compare operations if they are no longer otherwise used. Also, invalid preheader DebugLoc is not used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158204 91177308-0d34-0410-b5e6-96231b3b80d8
35 lines
995 B
CMake
35 lines
995 B
CMake
set(LLVM_TARGET_DEFINITIONS PPC.td)
|
|
|
|
tablegen(LLVM PPCGenAsmWriter.inc -gen-asm-writer)
|
|
tablegen(LLVM PPCGenCodeEmitter.inc -gen-emitter)
|
|
tablegen(LLVM PPCGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
|
|
tablegen(LLVM PPCGenRegisterInfo.inc -gen-register-info)
|
|
tablegen(LLVM PPCGenInstrInfo.inc -gen-instr-info)
|
|
tablegen(LLVM PPCGenDAGISel.inc -gen-dag-isel)
|
|
tablegen(LLVM PPCGenCallingConv.inc -gen-callingconv)
|
|
tablegen(LLVM PPCGenSubtargetInfo.inc -gen-subtarget)
|
|
add_public_tablegen_target(PowerPCCommonTableGen)
|
|
|
|
add_llvm_target(PowerPCCodeGen
|
|
PPCAsmPrinter.cpp
|
|
PPCBranchSelector.cpp
|
|
PPCCodeEmitter.cpp
|
|
PPCCTRLoops.cpp
|
|
PPCHazardRecognizers.cpp
|
|
PPCInstrInfo.cpp
|
|
PPCISelDAGToDAG.cpp
|
|
PPCISelLowering.cpp
|
|
PPCFrameLowering.cpp
|
|
PPCJITInfo.cpp
|
|
PPCMCInstLower.cpp
|
|
PPCMachineFunctionInfo.cpp
|
|
PPCRegisterInfo.cpp
|
|
PPCSubtarget.cpp
|
|
PPCTargetMachine.cpp
|
|
PPCSelectionDAGInfo.cpp
|
|
)
|
|
|
|
add_subdirectory(InstPrinter)
|
|
add_subdirectory(TargetInfo)
|
|
add_subdirectory(MCTargetDesc)
|