Jiangning Liu 1bc34d71b7 [AArch64] Disable some optimization cases for type conversion from sint to fp, because those optimization cases are micro-architecture dependent and only make sense for Cyclone. A new predicate Cyclone is introduced in .td file. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213827 91177308-0d34-0410-b5e6-96231b3b80d8		2014-07-24 01:29:59 +00:00
..
Analysis
Assembler
Bindings
Bitcode	AsmParser: remove deprecated LLIR support	2014-07-23 18:09:31 +00:00
BugPoint
CodeGen	[AArch64] Disable some optimization cases for type conversion from sint to fp, because those optimization cases are micro-architecture dependent and only make sense for Cyclone. A new predicate Cyclone is introduced in .td file.	2014-07-24 01:29:59 +00:00
DebugInfo
ExecutionEngine	[RuntimeDyld][AArch64] Update relocation tests and also add a simple GOT test.	2014-07-23 22:23:17 +00:00
Feature
FileCheck
Instrumentation
Integer
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LTO
MC	[SKX] Added missed test files for rev 213757	2014-07-23 18:17:49 +00:00
Object
Other
TableGen
tools
Transforms	SimplifyCFG: fix a bug in switch to table conversion	2014-07-23 23:13:23 +00:00
Unit
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.clang-format
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