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7c2cdb1c05
testcases accordingly. Some are currently xfailed and will be filed as bugs to be fixed or understood. Performance results: roughly neutral on SPEC some micro benchmarks in the llvm suite are up between 100 and 150%, only a pair of regressions that are due to be investigated john-the-ripper saw: 10% improvement in traditional DES 8% improvement in BSDI DES 59% improvement in FreeBSD MD5 67% improvement in OpenBSD Blowfish 14% improvement in LM DES Small compile time impact. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127208 91177308-0d34-0410-b5e6-96231b3b80d8
122 lines
7.6 KiB
LLVM
122 lines
7.6 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep asm-printer | grep 79
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; rdar://6802189
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; Test if linearscan is unfavoring registers for allocation to allow more reuse
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; of reloads from stack slots.
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%struct.SHA_CTX = type { i32, i32, i32, i32, i32, i32, i32, [16 x i32], i32 }
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define fastcc void @sha1_block_data_order(%struct.SHA_CTX* nocapture %c, i8* %p, i64 %num) nounwind {
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entry:
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br label %bb
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bb: ; preds = %bb, %entry
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%asmtmp511 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 0) nounwind ; <i32> [#uses=3]
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%asmtmp513 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 0) nounwind ; <i32> [#uses=2]
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%asmtmp516 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 0) nounwind ; <i32> [#uses=1]
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%asmtmp517 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 0) nounwind ; <i32> [#uses=2]
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%0 = xor i32 0, %asmtmp513 ; <i32> [#uses=0]
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%1 = add i32 0, %asmtmp517 ; <i32> [#uses=1]
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%2 = add i32 %1, 0 ; <i32> [#uses=1]
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%3 = add i32 %2, 0 ; <i32> [#uses=1]
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%asmtmp519 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 0) nounwind ; <i32> [#uses=1]
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%4 = xor i32 0, %asmtmp511 ; <i32> [#uses=1]
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%asmtmp520 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %4) nounwind ; <i32> [#uses=2]
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%5 = xor i32 0, %asmtmp516 ; <i32> [#uses=1]
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%6 = xor i32 %5, %asmtmp519 ; <i32> [#uses=1]
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%7 = add i32 %asmtmp513, -899497514 ; <i32> [#uses=1]
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%8 = add i32 %7, %asmtmp520 ; <i32> [#uses=1]
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%9 = add i32 %8, %6 ; <i32> [#uses=1]
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%10 = add i32 %9, 0 ; <i32> [#uses=1]
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%asmtmp523 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 0) nounwind ; <i32> [#uses=1]
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%asmtmp525 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %3) nounwind ; <i32> [#uses=2]
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%11 = xor i32 0, %asmtmp525 ; <i32> [#uses=1]
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%12 = add i32 0, %11 ; <i32> [#uses=1]
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%13 = add i32 %12, 0 ; <i32> [#uses=2]
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%asmtmp528 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %10) nounwind ; <i32> [#uses=1]
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%14 = xor i32 0, %asmtmp520 ; <i32> [#uses=1]
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%asmtmp529 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %14) nounwind ; <i32> [#uses=1]
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%asmtmp530 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 5, i32 %13) nounwind ; <i32> [#uses=1]
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%15 = add i32 0, %asmtmp530 ; <i32> [#uses=1]
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%16 = xor i32 0, %asmtmp523 ; <i32> [#uses=1]
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%asmtmp532 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %16) nounwind ; <i32> [#uses=2]
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%asmtmp533 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 5, i32 %15) nounwind ; <i32> [#uses=1]
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%17 = xor i32 %13, %asmtmp528 ; <i32> [#uses=1]
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%18 = xor i32 %17, 0 ; <i32> [#uses=1]
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%19 = add i32 %asmtmp525, -899497514 ; <i32> [#uses=1]
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%20 = add i32 %19, %asmtmp532 ; <i32> [#uses=1]
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%21 = add i32 %20, %18 ; <i32> [#uses=1]
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%22 = add i32 %21, %asmtmp533 ; <i32> [#uses=1]
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%23 = xor i32 0, %asmtmp511 ; <i32> [#uses=1]
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%24 = xor i32 %23, 0 ; <i32> [#uses=1]
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%asmtmp535 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %24) nounwind ; <i32> [#uses=3]
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%25 = add i32 0, %asmtmp535 ; <i32> [#uses=1]
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%26 = add i32 %25, 0 ; <i32> [#uses=1]
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%27 = add i32 %26, 0 ; <i32> [#uses=1]
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%28 = xor i32 0, %asmtmp529 ; <i32> [#uses=0]
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%29 = xor i32 %22, 0 ; <i32> [#uses=1]
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%30 = xor i32 %29, 0 ; <i32> [#uses=1]
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%31 = add i32 0, %30 ; <i32> [#uses=1]
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%32 = add i32 %31, 0 ; <i32> [#uses=3]
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%asmtmp541 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 0) nounwind ; <i32> [#uses=2]
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%asmtmp542 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 5, i32 %32) nounwind ; <i32> [#uses=1]
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%33 = add i32 0, %asmtmp541 ; <i32> [#uses=1]
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%34 = add i32 %33, 0 ; <i32> [#uses=1]
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%35 = add i32 %34, %asmtmp542 ; <i32> [#uses=1]
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%asmtmp543 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %27) nounwind ; <i32> [#uses=2]
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%36 = xor i32 0, %asmtmp535 ; <i32> [#uses=0]
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%37 = xor i32 %32, 0 ; <i32> [#uses=1]
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%38 = xor i32 %37, %asmtmp543 ; <i32> [#uses=1]
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%39 = add i32 0, %38 ; <i32> [#uses=1]
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%40 = add i32 %39, 0 ; <i32> [#uses=2]
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%asmtmp546 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %32) nounwind ; <i32> [#uses=1]
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%asmtmp547 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 0) nounwind ; <i32> [#uses=2]
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%41 = add i32 0, -899497514 ; <i32> [#uses=1]
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%42 = add i32 %41, %asmtmp547 ; <i32> [#uses=1]
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%43 = add i32 %42, 0 ; <i32> [#uses=1]
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%44 = add i32 %43, 0 ; <i32> [#uses=3]
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%asmtmp549 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %35) nounwind ; <i32> [#uses=2]
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%45 = xor i32 0, %asmtmp541 ; <i32> [#uses=1]
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%asmtmp550 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %45) nounwind ; <i32> [#uses=2]
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%asmtmp551 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 5, i32 %44) nounwind ; <i32> [#uses=1]
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%46 = xor i32 %40, %asmtmp546 ; <i32> [#uses=1]
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%47 = xor i32 %46, %asmtmp549 ; <i32> [#uses=1]
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%48 = add i32 %asmtmp543, -899497514 ; <i32> [#uses=1]
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%49 = add i32 %48, %asmtmp550 ; <i32> [#uses=1]
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%50 = add i32 %49, %47 ; <i32> [#uses=1]
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%51 = add i32 %50, %asmtmp551 ; <i32> [#uses=1]
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%asmtmp552 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %40) nounwind ; <i32> [#uses=2]
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%52 = xor i32 %44, %asmtmp549 ; <i32> [#uses=1]
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%53 = xor i32 %52, %asmtmp552 ; <i32> [#uses=1]
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%54 = add i32 0, %53 ; <i32> [#uses=1]
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%55 = add i32 %54, 0 ; <i32> [#uses=2]
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%asmtmp555 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %44) nounwind ; <i32> [#uses=2]
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%56 = xor i32 0, %asmtmp532 ; <i32> [#uses=1]
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%57 = xor i32 %56, %asmtmp547 ; <i32> [#uses=1]
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%asmtmp556 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %57) nounwind ; <i32> [#uses=1]
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%58 = add i32 0, %asmtmp556 ; <i32> [#uses=1]
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%59 = add i32 %58, 0 ; <i32> [#uses=1]
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%60 = add i32 %59, 0 ; <i32> [#uses=1]
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%asmtmp558 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %51) nounwind ; <i32> [#uses=1]
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%61 = xor i32 %asmtmp517, %asmtmp511 ; <i32> [#uses=1]
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%62 = xor i32 %61, %asmtmp535 ; <i32> [#uses=1]
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%63 = xor i32 %62, %asmtmp550 ; <i32> [#uses=1]
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%asmtmp559 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %63) nounwind ; <i32> [#uses=1]
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%64 = xor i32 %55, %asmtmp555 ; <i32> [#uses=1]
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%65 = xor i32 %64, %asmtmp558 ; <i32> [#uses=1]
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%asmtmp561 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %55) nounwind ; <i32> [#uses=1]
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%66 = add i32 %asmtmp552, -899497514 ; <i32> [#uses=1]
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%67 = add i32 %66, %65 ; <i32> [#uses=1]
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%68 = add i32 %67, %asmtmp559 ; <i32> [#uses=1]
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%69 = add i32 %68, 0 ; <i32> [#uses=1]
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%70 = add i32 %69, 0 ; <i32> [#uses=1]
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store i32 %70, i32* null, align 4
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%71 = add i32 0, %60 ; <i32> [#uses=1]
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store i32 %71, i32* null, align 4
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%72 = add i32 0, %asmtmp561 ; <i32> [#uses=1]
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store i32 %72, i32* null, align 4
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%73 = add i32 0, %asmtmp555 ; <i32> [#uses=1]
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store i32 %73, i32* null, align 4
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br label %bb
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}
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