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05ec712e7f
OK, not really. We don't want to reintroduce the old rewriter hacks. This patch extracts virtual register rewriting as a separate pass that runs after the register allocator. This is possible now that CodeGen/Passes.cpp can configure the full optimizing register allocator pipeline. The rewriter pass uses register assignments in VirtRegMap to rewrite virtual registers to physical registers, and it inserts kill flags based on live intervals. These finalization steps are the same for the optimizing register allocators: RABasic, RAGreedy, and PBQP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158244 91177308-0d34-0410-b5e6-96231b3b80d8
76 lines
3.0 KiB
C++
76 lines
3.0 KiB
C++
//===-- CodeGen.cpp -------------------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the common initialization routines for the
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// CodeGen library.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/InitializePasses.h"
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#include "llvm-c/Initialization.h"
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using namespace llvm;
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/// initializeCodeGen - Initialize all passes linked into the CodeGen library.
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void llvm::initializeCodeGen(PassRegistry &Registry) {
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initializeBranchFolderPassPass(Registry);
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initializeCalculateSpillWeightsPass(Registry);
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initializeCodePlacementOptPass(Registry);
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initializeDeadMachineInstructionElimPass(Registry);
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initializeExpandPostRAPass(Registry);
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initializeExpandISelPseudosPass(Registry);
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initializeFinalizeMachineBundlesPass(Registry);
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initializeGCMachineCodeAnalysisPass(Registry);
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initializeGCModuleInfoPass(Registry);
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initializeIfConverterPass(Registry);
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initializeLiveDebugVariablesPass(Registry);
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initializeLiveIntervalsPass(Registry);
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initializeLiveStacksPass(Registry);
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initializeLiveVariablesPass(Registry);
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initializeLocalStackSlotPassPass(Registry);
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initializeMachineBlockFrequencyInfoPass(Registry);
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initializeMachineBlockPlacementPass(Registry);
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initializeMachineBlockPlacementStatsPass(Registry);
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initializeMachineCopyPropagationPass(Registry);
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initializeMachineCSEPass(Registry);
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initializeMachineDominatorTreePass(Registry);
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initializeMachineLICMPass(Registry);
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initializeMachineLoopInfoPass(Registry);
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initializeMachineModuleInfoPass(Registry);
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initializeMachineSchedulerPass(Registry);
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initializeMachineSinkingPass(Registry);
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initializeMachineVerifierPassPass(Registry);
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initializeOptimizePHIsPass(Registry);
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initializePHIEliminationPass(Registry);
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initializePeepholeOptimizerPass(Registry);
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initializePostRASchedulerPass(Registry);
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initializeProcessImplicitDefsPass(Registry);
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initializePEIPass(Registry);
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initializeRegisterCoalescerPass(Registry);
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initializeRenderMachineFunctionPass(Registry);
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initializeSlotIndexesPass(Registry);
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initializeStackProtectorPass(Registry);
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initializeStackSlotColoringPass(Registry);
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initializeStrongPHIEliminationPass(Registry);
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initializeTailDuplicatePassPass(Registry);
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initializeTargetPassConfigPass(Registry);
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initializeTwoAddressInstructionPassPass(Registry);
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initializeUnpackMachineBundlesPass(Registry);
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initializeUnreachableBlockElimPass(Registry);
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initializeUnreachableMachineBlockElimPass(Registry);
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initializeVirtRegMapPass(Registry);
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initializeVirtRegRewriterPass(Registry);
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initializeLowerIntrinsicsPass(Registry);
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initializeMachineFunctionPrinterPassPass(Registry);
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}
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void LLVMInitializeCodeGen(LLVMPassRegistryRef R) {
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initializeCodeGen(*unwrap(R));
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}
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