Andrew Trick 1c2d3c538c sched: fix latency of memory dependence chain edges for consistency. ... For store->load dependencies that may alias, we should always use TrueMemOrderLatency, which may eventually become a subtarget hook. In effect, we should guarantee at least TrueMemOrderLatency on at least one DAG path from a store to a may-alias load. This should fix the standard mode as well as -enable-aa-sched-mi". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158380 91177308-0d34-0410-b5e6-96231b3b80d8		2012-06-13 02:39:03 +00:00
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ARM	sched: fix latency of memory dependence chain edges for consistency.	2012-06-13 02:39:03 +00:00
CellSPU	Flip the new block-placement pass to be on by default.	2012-04-16 13:49:17 +00:00
CPP	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
Generic	Fix test case to work on ARM.	2012-06-11 16:01:14 +00:00
Hexagon	Enable all Hexagon tests.	2012-05-15 16:13:12 +00:00
MBlaze	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
Mips	Add a test case for mips64 unaligned load/store instructions.	2012-06-04 17:57:06 +00:00
MSP430	These tests used intrinsics with the wrong prototype. They weren't caught because	2012-05-27 19:35:41 +00:00
NVPTX	Add llvm.fabs intrinsic.	2012-05-28 21:48:37 +00:00
PowerPC	Enable ILP scheduling for all nodes by default on PPC.	2012-06-10 19:32:29 +00:00
SPARC	Regression test for PR2960.	2012-05-01 11:11:34 +00:00
Thumb	Make test less fragile.	2012-04-27 20:48:18 +00:00
Thumb2	Add a test case for global live range splitting.	2012-05-23 23:42:23 +00:00
X86	Replace XOP vpcom intrinsics with fewer intrinsics that take the immediate as an argument.	2012-06-09 16:46:13 +00:00
XCore	Flip the new block-placement pass to be on by default.	2012-04-16 13:49:17 +00:00