mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-09 15:57:28 +00:00
1c3af779fc
Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>. t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the assembly printer correctly prints the 's' suffix. Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags. Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS. Fixes ARM SBC lowering to check for live carry (potential bug). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130048 91177308-0d34-0410-b5e6-96231b3b80d8
70 lines
1.5 KiB
LLVM
70 lines
1.5 KiB
LLVM
; RUN: llc -march=thumb -mattr=+thumb2 < %s | FileCheck %s
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define i64 @f1(i64 %a, i64 %b) {
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; CHECK: f1
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; CHECK: subs r0, r0, r2
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%tmp = sub i64 %a, %b
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ret i64 %tmp
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}
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; 734439407618 = 0x000000ab00000002
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define i64 @f2(i64 %a) {
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; CHECK: f2
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; CHECK: subs r0, #2
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; CHECK: sbc r1, r1, #171
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%tmp = sub i64 %a, 734439407618
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ret i64 %tmp
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}
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; 5066626890203138 = 0x0012001200000002
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define i64 @f3(i64 %a) {
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; CHECK: f3
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; CHECK: subs r0, #2
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; CHECK: sbc r1, r1, #1179666
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%tmp = sub i64 %a, 5066626890203138
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ret i64 %tmp
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}
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; 3747052064576897026 = 0x3400340000000002
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define i64 @f4(i64 %a) {
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; CHECK: f4
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; CHECK: subs r0, #2
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; CHECK: sbc r1, r1, #872428544
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%tmp = sub i64 %a, 3747052064576897026
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ret i64 %tmp
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}
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; 6221254862626095106 = 0x5656565600000002
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define i64 @f5(i64 %a) {
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; CHECK: f5
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; CHECK: subs r0, #2
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; CHECK: adc r1, r1, #-1448498775
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%tmp = sub i64 %a, 6221254862626095106
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ret i64 %tmp
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}
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; 287104476244869122 = 0x03fc000000000002
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define i64 @f6(i64 %a) {
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; CHECK: f6
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; CHECK: subs r0, #2
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; CHECK: sbc r1, r1, #66846720
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%tmp = sub i64 %a, 287104476244869122
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ret i64 %tmp
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}
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; Example from numerics code that manually computes wider-than-64 values.
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;
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; CHECK: _livecarry:
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; CHECK: adds
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; CHECK: adcs
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; CHECK: adc
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define i64 @livecarry(i64 %carry, i32 %digit) nounwind {
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%ch = lshr i64 %carry, 32
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%cl = and i64 %carry, 4294967295
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%truncdigit = zext i32 %digit to i64
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%prod = add i64 %cl, %truncdigit
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%ph = lshr i64 %prod, 32
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%carryresult = add i64 %ch, %ph
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ret i64 %carryresult
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}
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