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https://github.com/c64scene-ar/llvm-6502.git
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b503b49b51
This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181204 91177308-0d34-0410-b5e6-96231b3b80d8
82 lines
2.4 KiB
LLVM
82 lines
2.4 KiB
LLVM
; Test variable-sized allocas and addresses based on them in cases where
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; stack arguments are needed.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK1
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK2
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-A
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-B
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-C
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-D
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-FP
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declare i64 @bar(i8 *%a, i8 *%b, i8 *%c, i8 *%d, i8 *%e, i64 %f, i64 %g)
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; Allocate %length bytes and take addresses based on the result.
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; There are two stack arguments, so an offset of 160 + 2 * 8 == 176
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; is added to the copy of %r15.
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define i64 @f1(i64 %length, i64 %index) {
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; The full allocation sequence is:
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;
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; la %r0, 7(%r2) 1
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; nill %r0, 0xfff8 1
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; lgr %r1, %r15 2
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; sgr %r1, %r0 1 2
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; lgr %r15, %r1 2
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;
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; The third instruction does not depend on the first two, so check for
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; two fully-ordered sequences.
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;
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; FIXME: a better sequence would be:
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;
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; lgr %r1, %r15
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; sgr %r1, %r2
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; nill %r1, 0xfff8
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; lgr %r15, %r1
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;
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; CHECK1: f1:
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; CHECK1: la %r0, 7(%r2)
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; CHECK1: nill %r0, 65528
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; CHECK1: sgr %r1, %r0
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; CHECK1: lgr %r15, %r1
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;
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; CHECK2: f1:
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; CHECK2: lgr %r1, %r15
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; CHECK2: sgr %r1, %r0
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; CHECK2: lgr %r15, %r1
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;
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; CHECK-A: f1:
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; CHECK-A: lgr %r15, %r1
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; CHECK-A: la %r2, 176(%r1)
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;
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; CHECK-B: f1:
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; CHECK-B: lgr %r15, %r1
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; CHECK-B: la %r3, 177(%r1)
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;
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; CHECK-C: f1:
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; CHECK-C: lgr %r15, %r1
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; CHECK-C: la %r4, 4095({{%r3,%r1|%r1,%r3}})
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;
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; CHECK-D: f1:
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; CHECK-D: lgr %r15, %r1
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; CHECK-D: lay %r5, 4096({{%r3,%r1|%r1,%r3}})
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;
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; CHECK-E: f1:
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; CHECK-E: lgr %r15, %r1
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; CHECK-E: lay %r6, 4271({{%r3,%r1|%r1,%r3}})
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;
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; CHECK-FP: f1:
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; CHECK-FP: lgr %r11, %r15
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; CHECK-FP: lmg %r6, %r15, 224(%r11)
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%a = alloca i8, i64 %length
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%b = getelementptr i8 *%a, i64 1
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%cindex = add i64 %index, 3919
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%c = getelementptr i8 *%a, i64 %cindex
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%dindex = add i64 %index, 3920
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%d = getelementptr i8 *%a, i64 %dindex
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%eindex = add i64 %index, 4095
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%e = getelementptr i8 *%a, i64 %eindex
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%count = call i64 @bar(i8 *%a, i8 *%b, i8 *%c, i8 *%d, i8 *%e, i64 0, i64 0)
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%res = add i64 %count, 1
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ret i64 %res
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}
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