Jakob Stoklund Olesen 64110ffc9e Add SchedRW as an Instruction field. ... Don't require instructions to inherit Sched<...>. Sometimes it is more convenient to say: let SchedRW = ... in { ... } Which is now possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177199 91177308-0d34-0410-b5e6-96231b3b80d8		2013-03-15 22:51:13 +00:00
..
CostTable.h	Moving Cost Tables up to share with other targets	2013-01-24 23:01:00 +00:00
Mangler.h
Target.td	Add SchedRW as an Instruction field.	2013-03-15 22:51:13 +00:00
TargetCallingConv.h
TargetCallingConv.td
TargetFrameLowering.h	Provide the register scavenger to processFunctionBeforeFrameFinalized	2013-03-14 20:33:40 +00:00
TargetInstrInfo.h
TargetIntrinsicInfo.h
TargetItinerary.td
TargetJITInfo.h
TargetLibraryInfo.h	Add more functions to the TLI.	2013-03-05 21:47:40 +00:00
TargetLowering.h	Add a new method which enables one to change register classes.	2013-03-14 22:02:09 +00:00
TargetLoweringObjectFile.h
TargetMachine.h	Reset some of the target options which affect code generation.	2013-03-13 22:26:59 +00:00
TargetOpcodes.h
TargetOptions.h
TargetRegisterInfo.h	Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo	2013-02-21 20:05:00 +00:00
TargetSchedule.td	MachineModel: Add a ProcResGroup class.	2013-03-14 21:21:50 +00:00
TargetSelectionDAG.td
TargetSelectionDAGInfo.h
TargetSubtargetInfo.h	Use the 'target-features' and 'target-cpu' attributes to reset the subtarget features.	2013-02-15 22:31:27 +00:00