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AArch64
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Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
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2013-10-10 17:00:52 +00:00 |
ARM
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ARM: correct liveness flags during ARMLoadStoreOpt
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2013-10-10 09:28:20 +00:00 |
CPP
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[tests] Cleanup initialization of test suffixes.
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2013-08-16 00:37:11 +00:00 |
Generic
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Change objectsize intrinsic to accept different address spaces.
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2013-10-07 18:06:48 +00:00 |
Hexagon
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TBAA: remove !tbaa from testing cases when they are not needed.
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2013-09-30 18:17:35 +00:00 |
Inputs
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Debug Info: add an identifier field to DICompositeType.
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2013-08-26 22:39:55 +00:00 |
Mips
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[mips] Do not generate INS/EXT nodes if target does not have support for
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2013-10-09 23:36:17 +00:00 |
MSP430
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[tests] Cleanup initialization of test suffixes.
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2013-08-16 00:37:11 +00:00 |
NVPTX
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[NVPTX] Make constant vector test case endian-independent
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2013-09-19 13:14:44 +00:00 |
PowerPC
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TBAA: update tbaa format from scalar format to struct-path aware format.
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2013-09-30 18:17:55 +00:00 |
R600
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R600: Fix trunc i64 to i32 on SI
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2013-10-10 18:04:16 +00:00 |
SPARC
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[Sparc] Disable tail call optimization for sparc64.
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2013-10-09 12:50:39 +00:00 |
SystemZ
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[SystemZ] Add comparisons of high words and memory
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2013-10-01 15:00:44 +00:00 |
Thumb
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ARM: Use "dmb sy" for barriers on M-class CPUs
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2013-08-28 14:39:19 +00:00 |
Thumb2
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Fix spelling intruction -> instruction.
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2013-09-28 11:46:15 +00:00 |
X86
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Disable function padding to get this test to pass on atom.
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2013-10-10 12:46:23 +00:00 |
XCore
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XCore handling of thread local lowering
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2013-09-09 10:42:11 +00:00 |