llvm-6502/test/CodeGen/PowerPC
Ulrich Weigand 1edaab996f [PowerPC] Constrain base register in PPCRegisterInfo::resolveFrameIndex
I've run into a bug where current LLVM at -O0 (with fast-isel)
generated invalid code like:

        ld 0, 20936(1)                  # 8-byte Folded Reload
        stw 12, 10348(0)
        stw 12, 10344(0)

The underlying vreg had been introduced as base register by the
Local Stack Slot Allocation pass.  That register was constrained
to G8RC by PPCRegisterInfo::materializeFrameBaseRegister to match
the ADDI instruction used to set it, but it was *not* constrained
to G8RC_NOX0 to fit the *use* of the register in an address.

That should have happened in PPCRegisterInfo::resolveFrameIndex.
This patch adds an appropriate constrainRegClass call.

Reviewed by Hal Finkel.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211897 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 13:04:12 +00:00
..
2004-11-29-ShrCrash.ll
2004-11-30-shift-crash.ll
2004-11-30-shr-var-crash.ll
2004-12-12-ZeroSizeCommon.ll
2005-01-14-SetSelectCrash.ll
2005-01-14-UndefLong.ll
2005-08-12-rlwimi-crash.ll
2005-09-02-LegalizeDuplicatesCalls.ll
2005-10-08-ArithmeticRotate.ll
2005-11-30-vastart-crash.ll
2006-01-11-darwin-fp-argument.ll
2006-01-20-ShiftPartsCrash.ll
2006-04-01-FloatDoubleExtend.ll
2006-04-05-splat-ish.ll
2006-04-19-vmaddfp-crash.ll
2006-05-12-rlwimi-crash.ll
2006-07-07-ComputeMaskedBits.ll
2006-07-19-stwbrx-crash.ll
2006-08-11-RetVector.ll
2006-08-15-SelectionCrash.ll
2006-09-28-shift_64.ll
2006-10-13-Miscompile.ll
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2006-10-17-ppc64-alloca.ll
2006-11-10-DAGCombineMiscompile.ll
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2006-12-07-LargeAlloca.ll
2006-12-07-SelectCrash.ll
2007-01-04-ArgExtension.ll
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2007-01-29-lbrx-asm.ll
2007-01-31-InlineAsmAddrMode.ll
2007-02-16-AlignPacked.ll
2007-02-16-InlineAsmNConstraint.ll
2007-02-23-lr-saved-twice.ll
2007-03-24-cntlzd.ll
2007-03-30-SpillerCrash.ll
2007-04-24-InlineAsm-I-Modifier.ll
2007-04-30-InlineAsmEarlyClobber.ll
2007-05-03-InlineAsm-S-Constraint.ll
2007-05-14-InlineAsmSelectCrash.ll
2007-05-22-tailmerge-3.ll
2007-05-30-dagcombine-miscomp.ll
2007-06-28-BCCISelBug.ll
2007-08-04-CoalescerAssert.ll
2007-09-04-AltivecDST.ll
2007-09-07-LoadStoreIdxForms.ll
2007-09-08-unaligned.ll
2007-09-11-RegCoalescerAssert.ll
2007-09-12-LiveIntervalsAssert.ll
2007-10-16-InlineAsmFrameOffset.ll
2007-10-18-PtrArithmetic.ll
2007-10-21-LocalRegAllocAssert2.ll
2007-10-21-LocalRegAllocAssert.ll
2007-11-04-CoalescerCrash.ll
2007-11-16-landingpad-split.ll Add the ability to use GEPs for address sinking in CGP 2014-04-12 00:59:48 +00:00
2007-11-19-VectorSplitting.ll
2008-02-05-LiveIntervalsAssert.ll
2008-02-09-LocalRegAllocAssert.ll
2008-03-05-RegScavengerAssert.ll
2008-03-17-RegScavengerCrash.ll
2008-03-18-RegScavengerAssert.ll
2008-03-24-AddressRegImm.ll
2008-03-24-CoalescerBug.ll
2008-03-26-CoalescerBug.ll
2008-04-10-LiveIntervalCrash.ll
2008-04-16-CoalescerBug.ll
2008-04-23-CoalescerCrash.ll
2008-05-01-ppc_fp128.ll
2008-06-19-LegalizerCrash.ll
2008-06-21-F128LoadStore.ll
2008-06-23-LiveVariablesCrash.ll
2008-07-10-SplatMiscompile.ll [PATCH] Correct type used for VADD_SPLAT optimization on PowerPC 2014-05-27 15:57:51 +00:00
2008-07-15-Bswap.ll
2008-07-15-Fabs.ll
2008-07-15-SignExtendInreg.ll
2008-07-17-Fneg.ll
2008-07-24-PPC64-CCBug.ll
2008-09-12-CoalescerBug.ll
2008-10-17-AsmMatchingOperands.ll
2008-10-28-f128-i32.ll
2008-10-28-UnprocessedNode.ll
2008-10-31-PPCF128Libcalls.ll
2008-12-02-LegalizeTypeAssert.ll
2009-01-16-DeclareISelBug.ll
2009-03-17-LSRBug.ll
2009-05-28-LegalizeBRCC.ll
2009-07-16-InlineAsm-M-Operand.ll
2009-08-17-inline-asm-addr-mode-breakage.ll
2009-09-18-carrybit.ll
2009-11-15-ProcImpDefsBug.ll
2009-11-25-ImpDefBug.ll
2010-02-04-EmptyGlobal.ll
2010-02-12-saveCR.ll
2010-03-09-indirect-call.ll
2010-04-01-MachineCSEBug.ll
2010-05-03-retaddr1.ll
2010-10-11-Fast-Varargs.ll
2010-12-18-PPCStackRefs.ll
2011-12-05-NoSpillDupCR.ll
2011-12-06-SpillAndRestoreCR.ll
2011-12-08-DemandedBitsMiscompile.ll
2012-09-16-TOC-entry-check.ll
2012-10-11-dynalloc.ll
2012-10-12-bitcast.ll
2012-11-16-mischedcall.ll
2013-05-15-preinc-fold.ll
2013-07-01-PHIElimBug.ll
a2-fp-basic.ll
a2q-stackalign.ll
a2q.ll
aa-tbaa.ll Reenable use of TBAA during CodeGen 2014-04-12 01:26:00 +00:00
addc.ll
addi-reassoc.ll
addrfuncstr.ll
alias.ll [PPC] Use alias symbols in address computation. 2014-05-29 15:41:38 +00:00
align.ll
allocate-r0.ll
altivec-ord.ll
and_add.ll
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and_sra.ll
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asm-dialect.ll
asm-Zy.ll
asym-regclass-copy.ll
atomic-1.ll IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
atomic-2.ll IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
Atomics-32.ll IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
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branch-opt.ll
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buildvec_canonicalize.ll
bv-pres-v8i1.ll
bv-widen-undef.ll
byval-agg-info.ll
calls.ll
can-lower-ret.ll
cc.ll [PowerPC] Add a full condition code register to make the "cc" clobber work 2014-04-04 15:15:57 +00:00
cmp-cmp.ll
coalesce-ext.ll
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compare-simm.ll
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constants.ll
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ctrloop-le.ll [PowerPC] Implement some additional TLI callbacks 2014-04-12 21:52:38 +00:00
ctrloop-lt.ll [PowerPC] Implement some additional TLI callbacks 2014-04-12 21:52:38 +00:00
ctrloop-ne.ll
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ctrloop-sh.ll [PowerPC] On PPC32, 128-bit shifts might be runtime calls 2014-05-11 16:23:29 +00:00
ctrloop-sums.ll
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cttz.ll
darwin-labels.ll
dbg.ll DebugInfo: Sure up subprogram variable list handling with more assertions and fewer conditionals. 2014-05-14 21:52:46 +00:00
DbgValueOtherTargets.test
dcbt-sched.ll
delete-node.ll
div-2.ll
dyn-alloca-aligned.ll
early-ret2.ll Rename loop unrolling and loop vectorizer metadata to have a common prefix. 2014-06-25 15:41:00 +00:00
early-ret.ll
empty-functions.ll
emptystruct.ll
eqv-andc-orc-nor.ll
extsh.ll
fabs.ll
fast-isel-binary.ll
fast-isel-br-const.ll
fast-isel-call.ll
fast-isel-cmp-imm.ll
fast-isel-conversion-p5.ll [PPC64] Fix PR20071 (fctiduz generated for targets lacking that instruction) 2014-06-24 20:05:18 +00:00
fast-isel-conversion.ll [PPC64] Fix PR20071 (fctiduz generated for targets lacking that instruction) 2014-06-24 20:05:18 +00:00
fast-isel-crash.ll
fast-isel-ext.ll
fast-isel-fold.ll
fast-isel-GEP-coalesce.ll
fast-isel-indirectbr.ll
fast-isel-load-store.ll
fast-isel-redefinition.ll
fast-isel-ret.ll
fast-isel-shifter.ll
fastisel-gep-promote-before-add.ll
fcpsgn.ll
float-asmprint.ll
float-to-int.ll
floatPSA.ll
fma.ll
fnabs.ll
fneg.ll
fold-li.ll
fold-zero.ll
fp_to_uint.ll
fp-branch.ll
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fpcopy.ll
frame-size.ll
frameaddr.ll
Frames-alloca.ll [PowerPC] Allow stack frames without parameter save area 2014-06-23 13:47:52 +00:00
Frames-large.ll [PowerPC] Allow stack frames without parameter save area 2014-06-23 13:47:52 +00:00
Frames-leaf.ll
Frames-small.ll [PowerPC] Allow stack frames without parameter save area 2014-06-23 13:47:52 +00:00
frounds.ll
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func-addr.ll [PPC64] Fix PR19893 - improve code generation for local function addresses 2014-06-16 21:36:02 +00:00
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hello.ll
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ifcvt.ll
illegal-element-type.ll
in-asm-f64-reg.ll
indexed-load.ll [PowerPC] PR19796: Also match ISD::TargetConstant in isIntS16Immediate 2014-05-20 17:20:34 +00:00
indirectbr.ll
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isel.ll
ispositive.ll
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lit.local.cfg Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
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mcm-10.ll [PowerPC] Implement some additional TLI callbacks 2014-04-12 21:52:38 +00:00
mcm-11.ll [PowerPC] Implement some additional TLI callbacks 2014-04-12 21:52:38 +00:00
mcm-12.ll
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mcm-obj-2.ll [PowerPC] Implement some additional TLI callbacks 2014-04-12 21:52:38 +00:00
mcm-obj.ll
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mul-with-overflow.ll
mulhs.ll
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mult-alt-generic-powerpc64.ll
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named-reg-alloc-r0.ll [PowerPC] Add global named register support 2014-05-11 19:29:11 +00:00
named-reg-alloc-r1-64.ll [PowerPC] Add global named register support 2014-05-11 19:29:11 +00:00
named-reg-alloc-r1.ll [PowerPC] Add global named register support 2014-05-11 19:29:11 +00:00
named-reg-alloc-r2-64.ll [PowerPC] Add global named register support 2014-05-11 19:29:11 +00:00
named-reg-alloc-r2.ll [PowerPC] Add global named register support 2014-05-11 19:29:11 +00:00
named-reg-alloc-r13-64.ll [PowerPC] Add global named register support 2014-05-11 19:29:11 +00:00
named-reg-alloc-r13.ll [PowerPC] Add global named register support 2014-05-11 19:29:11 +00:00
neg.ll
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ppc64-align-long-double.ll
ppc64-altivec-abi.ll [PowerPC] Fix on-stack AltiVec arguments with 64-bit SVR4 2014-06-23 12:36:34 +00:00
ppc64-calls.ll [PowerPC] Simplify and improve loading into TOC register 2014-06-18 17:52:49 +00:00
ppc64-crash.ll
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ppc64-linux-func-size.ll
ppc64-prefetch.ll
ppc64-smallarg.ll [PowerPC] Fix small argument stack slot offset for LE 2014-06-20 16:34:05 +00:00
ppc64-toc.ll
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ppc64-zext.ll
ppc64le-smallarg.ll [PowerPC] Fix small argument stack slot offset for LE 2014-06-20 16:34:05 +00:00
ppc440-fp-basic.ll
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r31.ll
recipest.ll
reg-coalesce-simple.ll
reg-names.ll
reloc-align.ll
remap-crash.ll
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resolvefi-basereg.ll [PowerPC] Constrain base register in PPCRegisterInfo::resolveFrameIndex 2014-06-27 13:04:12 +00:00
retaddr.ll
return-val-i128.ll
rlwimi2.ll
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rlwimi-dyn-and.ll [PowerPC] Fix rlwimi isel when mask is not constant 2014-04-13 17:10:58 +00:00
rlwimi-keep-rsh.ll
rlwimi.ll
rlwinm2.ll
rlwinm.ll
rotl-2.ll
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rotl.ll
rounding-ops.ll
rs-undef-use.ll
s000-alias-misched.ll
sdag-ppcf128.ll
sections.ll
select_lt0.ll
select-cc.ll
set0-v8i16.ll
setcc_no_zext.ll
seteq-0.ll
shift128.ll
shl_elim.ll
shl_sext.ll
sign_ext_inreg1.ll
sj-ctr-loop.ll
sjlj.ll
small-arguments.ll
spill-nor0.ll
splat-bug.ll [PATCH] Correct type used for VADD_SPLAT optimization on PowerPC 2014-05-27 15:57:51 +00:00
srl-mask.ll
stack-protector.ll
stack-realign.ll
std-unal-fi.ll
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stfiwx-2.ll
stfiwx.ll
store-load-fwd.ll
store-update.ll
structsinmem.ll
structsinregs.ll
stubs.ll
stwu8.ll
stwu-gta.ll
stwux.ll
sub-bv-types.ll
subc.ll
subsumes-pred-regs.ll
svr4-redzone.ll [PowerPC] Allow stack frames without parameter save area 2014-06-23 13:47:52 +00:00
tailcall1-64.ll
tailcall1.ll
tailcallpic1.ll
tls-pic.ll
tls.ll
trampoline.ll
unal4-std.ll
unal-altivec2.ll
unal-altivec.ll
unaligned.ll
unsafe-math.ll
unwind-dw2-g.ll
unwind-dw2.ll
vaddsplat.ll
varargs-struct-float.ll
varargs.ll
vcmp-fold.ll
vec_auto_constant.ll
vec_br_cmp.ll
vec_buildvector_loadstore.ll
vec_call.ll
vec_cmp.ll Fix typos 2014-06-19 19:41:26 +00:00
vec_constants.ll
vec_conv.ll
vec_extload.ll
vec_fmuladd.ll
vec_fneg.ll
vec_insert.ll
vec_misaligned.ll [PPC64LE] Generate correct code for unaligned little-endian vector loads 2014-06-09 22:00:52 +00:00
vec_mul.ll [PPC64LE] Generate correct little-endian code for v16i8 multiply 2014-06-09 16:06:29 +00:00
vec_perf_shuffle.ll
vec_rounding.ll
vec_select.ll
vec_shift.ll
vec_shuffle_le.ll [PPC64LE] Recognize shufflevector patterns for little endian 2014-06-10 14:35:01 +00:00
vec_shuffle.ll
vec_splat_constant.ll
vec_splat.ll
vec_sqrt.ll
vec_vrsave.ll
vec_zero.ll
vec-abi-align.ll
vector-identity-shuffle.ll
vector.ll
vperm-instcombine.ll [PPC64LE] Add test case for r210282 commit 2014-06-05 22:57:38 +00:00
vperm-lowering.ll [PPC64LE] Fix lowering of BUILD_VECTOR and SHUFFLE_VECTOR for little endian 2014-06-06 14:06:26 +00:00
vrsave-spill.ll
vrspill.ll
vsx-args.ll
vsx-fma-m.ll
vsx-self-copy.ll
vsx-spill.ll
vsx.ll [PowerPC] Add some missing VSX bitcast patterns 2014-04-01 19:24:27 +00:00
vtable-reloc.ll
weak_def_can_be_hidden.ll
zero-not-run.ll