Andrew Trick 3be654f808 Lower ARM adds/subs to add/sub after adding optional CPSR operand. ... This is still a hack until we can teach tblgen to generate the optional CPSR operand rather than an implicit CPSR def. But the strangeness is now limited to the selection DAG. ADD/SUB MI's no longer have implicit CPSR defs, nor do we allow flag setting variants of these opcodes in machine code. There are several corner cases to consider, and getting one wrong would previously lead to nasty miscompilation. It's not the first time I've debugged one, so this time I added enough verification to ensure it won't happen again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140228 91177308-0d34-0410-b5e6-96231b3b80d8		2011-09-21 02:20:46 +00:00
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Mangler.h
Target.td
TargetCallingConv.h
TargetCallingConv.td
TargetData.h
TargetELFWriterInfo.h
TargetFrameLowering.h
TargetInstrInfo.h
TargetIntrinsicInfo.h
TargetJITInfo.h
TargetLibraryInfo.h
TargetLowering.h
TargetLoweringObjectFile.h
TargetMachine.h
TargetOpcodes.h
TargetOptions.h
TargetRegisterInfo.h
TargetSchedule.td
TargetSelectionDAG.td
TargetSelectionDAGInfo.h
TargetSubtargetInfo.h