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This moves the transformation introduced in r223757 into a separate MI pass. This allows it to cover many more cases (not only cases where there must be a reserved call frame), and perform rudimentary call folding. It still doesn't have a heuristic, so it is enabled only for optsize/minsize, with stack alignment <= 8, where it ought to be a fairly clear win. (Re-commit of r227728) Differential Revision: http://reviews.llvm.org/D6789 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227752 91177308-0d34-0410-b5e6-96231b3b80d8
962 lines
37 KiB
C++
962 lines
37 KiB
C++
//===-- PrologEpilogInserter.cpp - Insert Prolog/Epilog code in function --===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass is responsible for finalizing the functions frame layout, saving
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// callee saved registers, and for emitting prolog & epilog code for the
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// function.
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//
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// This pass must be run after register allocation. After this pass is
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// executed, it is illegal to construct MO_FrameIndex operands.
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//
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//===----------------------------------------------------------------------===//
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#include "PrologEpilogInserter.h"
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#include "llvm/ADT/IndexedMap.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/RegisterScavenging.h"
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#include "llvm/CodeGen/StackProtector.h"
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#include "llvm/IR/DiagnosticInfo.h"
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#include "llvm/IR/InlineAsm.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetFrameLowering.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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#include <climits>
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using namespace llvm;
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#define DEBUG_TYPE "pei"
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char PEI::ID = 0;
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char &llvm::PrologEpilogCodeInserterID = PEI::ID;
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static cl::opt<unsigned>
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WarnStackSize("warn-stack-size", cl::Hidden, cl::init((unsigned)-1),
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cl::desc("Warn for stack size bigger than the given"
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" number"));
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INITIALIZE_PASS_BEGIN(PEI, "prologepilog",
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"Prologue/Epilogue Insertion", false, false)
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INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
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INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
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INITIALIZE_PASS_DEPENDENCY(StackProtector)
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INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
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INITIALIZE_PASS_END(PEI, "prologepilog",
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"Prologue/Epilogue Insertion & Frame Finalization",
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false, false)
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STATISTIC(NumScavengedRegs, "Number of frame index regs scavenged");
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STATISTIC(NumBytesStackSpace,
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"Number of bytes used for stack in all functions");
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void PEI::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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AU.addPreserved<MachineLoopInfo>();
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AU.addPreserved<MachineDominatorTree>();
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AU.addRequired<StackProtector>();
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AU.addRequired<TargetPassConfig>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool PEI::isReturnBlock(MachineBasicBlock* MBB) {
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return (MBB && !MBB->empty() && MBB->back().isReturn());
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}
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/// Compute the set of return blocks
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void PEI::calculateSets(MachineFunction &Fn) {
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// Sets used to compute spill, restore placement sets.
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const std::vector<CalleeSavedInfo> &CSI =
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Fn.getFrameInfo()->getCalleeSavedInfo();
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// If no CSRs used, we are done.
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if (CSI.empty())
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return;
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// Save refs to entry and return blocks.
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EntryBlock = Fn.begin();
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for (MachineFunction::iterator MBB = Fn.begin(), E = Fn.end();
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MBB != E; ++MBB)
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if (isReturnBlock(MBB))
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ReturnBlocks.push_back(MBB);
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return;
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}
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/// StackObjSet - A set of stack object indexes
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typedef SmallSetVector<int, 8> StackObjSet;
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/// runOnMachineFunction - Insert prolog/epilog code and replace abstract
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/// frame indexes with appropriate references.
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///
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bool PEI::runOnMachineFunction(MachineFunction &Fn) {
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const Function* F = Fn.getFunction();
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const TargetRegisterInfo *TRI = Fn.getSubtarget().getRegisterInfo();
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const TargetFrameLowering *TFI = Fn.getSubtarget().getFrameLowering();
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assert(!Fn.getRegInfo().getNumVirtRegs() && "Regalloc must assign all vregs");
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RS = TRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : nullptr;
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FrameIndexVirtualScavenging = TRI->requiresFrameIndexScavenging(Fn);
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// Calculate the MaxCallFrameSize and AdjustsStack variables for the
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// function's frame information. Also eliminates call frame pseudo
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// instructions.
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calculateCallsInformation(Fn);
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// Allow the target machine to make some adjustments to the function
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// e.g. UsedPhysRegs before calculateCalleeSavedRegisters.
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TFI->processFunctionBeforeCalleeSavedScan(Fn, RS);
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// Scan the function for modified callee saved registers and insert spill code
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// for any callee saved registers that are modified.
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calculateCalleeSavedRegisters(Fn);
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// Determine placement of CSR spill/restore code:
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// place all spills in the entry block, all restores in return blocks.
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calculateSets(Fn);
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// Add the code to save and restore the callee saved registers
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if (!F->hasFnAttribute(Attribute::Naked))
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insertCSRSpillsAndRestores(Fn);
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// Allow the target machine to make final modifications to the function
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// before the frame layout is finalized.
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TFI->processFunctionBeforeFrameFinalized(Fn, RS);
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// Calculate actual frame offsets for all abstract stack objects...
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calculateFrameObjectOffsets(Fn);
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// Add prolog and epilog code to the function. This function is required
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// to align the stack frame as necessary for any stack variables or
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// called functions. Because of this, calculateCalleeSavedRegisters()
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// must be called before this function in order to set the AdjustsStack
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// and MaxCallFrameSize variables.
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if (!F->hasFnAttribute(Attribute::Naked))
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insertPrologEpilogCode(Fn);
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// Replace all MO_FrameIndex operands with physical register references
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// and actual offsets.
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//
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replaceFrameIndices(Fn);
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// If register scavenging is needed, as we've enabled doing it as a
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// post-pass, scavenge the virtual registers that frame index elimination
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// inserted.
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if (TRI->requiresRegisterScavenging(Fn) && FrameIndexVirtualScavenging)
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scavengeFrameVirtualRegs(Fn);
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// Clear any vregs created by virtual scavenging.
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Fn.getRegInfo().clearVirtRegs();
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// Warn on stack size when we exceeds the given limit.
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MachineFrameInfo *MFI = Fn.getFrameInfo();
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uint64_t StackSize = MFI->getStackSize();
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if (WarnStackSize.getNumOccurrences() > 0 && WarnStackSize < StackSize) {
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DiagnosticInfoStackSize DiagStackSize(*F, StackSize);
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F->getContext().diagnose(DiagStackSize);
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}
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delete RS;
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ReturnBlocks.clear();
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return true;
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}
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/// calculateCallsInformation - Calculate the MaxCallFrameSize and AdjustsStack
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/// variables for the function's frame information and eliminate call frame
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/// pseudo instructions.
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void PEI::calculateCallsInformation(MachineFunction &Fn) {
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const TargetInstrInfo &TII = *Fn.getSubtarget().getInstrInfo();
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const TargetFrameLowering *TFI = Fn.getSubtarget().getFrameLowering();
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MachineFrameInfo *MFI = Fn.getFrameInfo();
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unsigned MaxCallFrameSize = 0;
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bool AdjustsStack = MFI->adjustsStack();
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// Get the function call frame set-up and tear-down instruction opcode
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int FrameSetupOpcode = TII.getCallFrameSetupOpcode();
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int FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
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// Early exit for targets which have no call frame setup/destroy pseudo
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// instructions.
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if (FrameSetupOpcode == -1 && FrameDestroyOpcode == -1)
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return;
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std::vector<MachineBasicBlock::iterator> FrameSDOps;
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for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB)
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for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ++I)
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if (I->getOpcode() == FrameSetupOpcode ||
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I->getOpcode() == FrameDestroyOpcode) {
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assert(I->getNumOperands() >= 1 && "Call Frame Setup/Destroy Pseudo"
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" instructions should have a single immediate argument!");
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unsigned Size = I->getOperand(0).getImm();
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if (Size > MaxCallFrameSize) MaxCallFrameSize = Size;
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AdjustsStack = true;
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FrameSDOps.push_back(I);
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} else if (I->isInlineAsm()) {
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// Some inline asm's need a stack frame, as indicated by operand 1.
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unsigned ExtraInfo = I->getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
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if (ExtraInfo & InlineAsm::Extra_IsAlignStack)
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AdjustsStack = true;
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}
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MFI->setAdjustsStack(AdjustsStack);
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MFI->setMaxCallFrameSize(MaxCallFrameSize);
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for (std::vector<MachineBasicBlock::iterator>::iterator
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i = FrameSDOps.begin(), e = FrameSDOps.end(); i != e; ++i) {
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MachineBasicBlock::iterator I = *i;
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// If call frames are not being included as part of the stack frame, and
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// the target doesn't indicate otherwise, remove the call frame pseudos
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// here. The sub/add sp instruction pairs are still inserted, but we don't
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// need to track the SP adjustment for frame index elimination.
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if (TFI->canSimplifyCallFramePseudos(Fn))
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TFI->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
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}
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}
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/// calculateCalleeSavedRegisters - Scan the function for modified callee saved
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/// registers.
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void PEI::calculateCalleeSavedRegisters(MachineFunction &F) {
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const TargetRegisterInfo *RegInfo = F.getSubtarget().getRegisterInfo();
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const TargetFrameLowering *TFI = F.getSubtarget().getFrameLowering();
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MachineFrameInfo *MFI = F.getFrameInfo();
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// Get the callee saved register list...
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const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&F);
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// These are used to keep track the callee-save area. Initialize them.
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MinCSFrameIndex = INT_MAX;
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MaxCSFrameIndex = 0;
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// Early exit for targets which have no callee saved registers.
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if (!CSRegs || CSRegs[0] == 0)
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return;
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// In Naked functions we aren't going to save any registers.
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if (F.getFunction()->hasFnAttribute(Attribute::Naked))
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return;
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std::vector<CalleeSavedInfo> CSI;
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for (unsigned i = 0; CSRegs[i]; ++i) {
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unsigned Reg = CSRegs[i];
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// Functions which call __builtin_unwind_init get all their registers saved.
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if (F.getRegInfo().isPhysRegUsed(Reg) || F.getMMI().callsUnwindInit()) {
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// If the reg is modified, save it!
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CSI.push_back(CalleeSavedInfo(Reg));
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}
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}
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if (!TFI->assignCalleeSavedSpillSlots(F, RegInfo, CSI)) {
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// If target doesn't implement this, use generic code.
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if (CSI.empty())
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return; // Early exit if no callee saved registers are modified!
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unsigned NumFixedSpillSlots;
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const TargetFrameLowering::SpillSlot *FixedSpillSlots =
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TFI->getCalleeSavedSpillSlots(NumFixedSpillSlots);
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// Now that we know which registers need to be saved and restored, allocate
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// stack slots for them.
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for (std::vector<CalleeSavedInfo>::iterator I = CSI.begin(), E = CSI.end();
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I != E; ++I) {
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unsigned Reg = I->getReg();
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const TargetRegisterClass *RC = RegInfo->getMinimalPhysRegClass(Reg);
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int FrameIdx;
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if (RegInfo->hasReservedSpillSlot(F, Reg, FrameIdx)) {
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I->setFrameIdx(FrameIdx);
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continue;
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}
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// Check to see if this physreg must be spilled to a particular stack slot
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// on this target.
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const TargetFrameLowering::SpillSlot *FixedSlot = FixedSpillSlots;
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while (FixedSlot != FixedSpillSlots + NumFixedSpillSlots &&
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FixedSlot->Reg != Reg)
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++FixedSlot;
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if (FixedSlot == FixedSpillSlots + NumFixedSpillSlots) {
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// Nope, just spill it anywhere convenient.
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unsigned Align = RC->getAlignment();
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unsigned StackAlign = TFI->getStackAlignment();
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// We may not be able to satisfy the desired alignment specification of
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// the TargetRegisterClass if the stack alignment is smaller. Use the
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// min.
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Align = std::min(Align, StackAlign);
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FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true);
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if ((unsigned)FrameIdx < MinCSFrameIndex) MinCSFrameIndex = FrameIdx;
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if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx;
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} else {
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// Spill it to the stack where we must.
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FrameIdx =
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MFI->CreateFixedSpillStackObject(RC->getSize(), FixedSlot->Offset);
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}
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I->setFrameIdx(FrameIdx);
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}
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}
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MFI->setCalleeSavedInfo(CSI);
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}
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/// insertCSRSpillsAndRestores - Insert spill and restore code for
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/// callee saved registers used in the function.
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///
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void PEI::insertCSRSpillsAndRestores(MachineFunction &Fn) {
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// Get callee saved register information.
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MachineFrameInfo *MFI = Fn.getFrameInfo();
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const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
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MFI->setCalleeSavedInfoValid(true);
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// Early exit if no callee saved registers are modified!
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if (CSI.empty())
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return;
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const TargetInstrInfo &TII = *Fn.getSubtarget().getInstrInfo();
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const TargetFrameLowering *TFI = Fn.getSubtarget().getFrameLowering();
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const TargetRegisterInfo *TRI = Fn.getSubtarget().getRegisterInfo();
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MachineBasicBlock::iterator I;
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// Spill using target interface.
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I = EntryBlock->begin();
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if (!TFI->spillCalleeSavedRegisters(*EntryBlock, I, CSI, TRI)) {
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for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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// Add the callee-saved register as live-in.
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// It's killed at the spill.
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EntryBlock->addLiveIn(CSI[i].getReg());
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// Insert the spill to the stack frame.
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unsigned Reg = CSI[i].getReg();
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const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
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TII.storeRegToStackSlot(*EntryBlock, I, Reg, true, CSI[i].getFrameIdx(),
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RC, TRI);
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}
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}
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// Restore using target interface.
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for (unsigned ri = 0, re = ReturnBlocks.size(); ri != re; ++ri) {
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MachineBasicBlock *MBB = ReturnBlocks[ri];
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I = MBB->end();
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--I;
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// Skip over all terminator instructions, which are part of the return
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// sequence.
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MachineBasicBlock::iterator I2 = I;
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while (I2 != MBB->begin() && (--I2)->isTerminator())
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I = I2;
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bool AtStart = I == MBB->begin();
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MachineBasicBlock::iterator BeforeI = I;
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if (!AtStart)
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--BeforeI;
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// Restore all registers immediately before the return and any
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// terminators that precede it.
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if (!TFI->restoreCalleeSavedRegisters(*MBB, I, CSI, TRI)) {
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for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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unsigned Reg = CSI[i].getReg();
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const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
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TII.loadRegFromStackSlot(*MBB, I, Reg, CSI[i].getFrameIdx(), RC, TRI);
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assert(I != MBB->begin() &&
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"loadRegFromStackSlot didn't insert any code!");
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// Insert in reverse order. loadRegFromStackSlot can insert
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// multiple instructions.
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if (AtStart)
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I = MBB->begin();
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else {
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I = BeforeI;
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++I;
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}
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}
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}
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}
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}
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/// AdjustStackOffset - Helper function used to adjust the stack frame offset.
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static inline void
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AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx,
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bool StackGrowsDown, int64_t &Offset,
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unsigned &MaxAlign) {
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// If the stack grows down, add the object size to find the lowest address.
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if (StackGrowsDown)
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Offset += MFI->getObjectSize(FrameIdx);
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unsigned Align = MFI->getObjectAlignment(FrameIdx);
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// If the alignment of this object is greater than that of the stack, then
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// increase the stack alignment to match.
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MaxAlign = std::max(MaxAlign, Align);
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// Adjust to alignment boundary.
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Offset = (Offset + Align - 1) / Align * Align;
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if (StackGrowsDown) {
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DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << -Offset << "]\n");
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MFI->setObjectOffset(FrameIdx, -Offset); // Set the computed offset
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} else {
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DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << Offset << "]\n");
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MFI->setObjectOffset(FrameIdx, Offset);
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Offset += MFI->getObjectSize(FrameIdx);
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}
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}
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/// AssignProtectedObjSet - Helper function to assign large stack objects (i.e.,
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/// those required to be close to the Stack Protector) to stack offsets.
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static void
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AssignProtectedObjSet(const StackObjSet &UnassignedObjs,
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SmallSet<int, 16> &ProtectedObjs,
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MachineFrameInfo *MFI, bool StackGrowsDown,
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int64_t &Offset, unsigned &MaxAlign) {
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for (StackObjSet::const_iterator I = UnassignedObjs.begin(),
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E = UnassignedObjs.end(); I != E; ++I) {
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int i = *I;
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AdjustStackOffset(MFI, i, StackGrowsDown, Offset, MaxAlign);
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ProtectedObjs.insert(i);
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}
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}
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/// calculateFrameObjectOffsets - Calculate actual frame offsets for all of the
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/// abstract stack objects.
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///
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void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) {
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const TargetFrameLowering &TFI = *Fn.getSubtarget().getFrameLowering();
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StackProtector *SP = &getAnalysis<StackProtector>();
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bool StackGrowsDown =
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TFI.getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown;
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// Loop over all of the stack objects, assigning sequential addresses...
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MachineFrameInfo *MFI = Fn.getFrameInfo();
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|
// Start at the beginning of the local area.
|
|
// The Offset is the distance from the stack top in the direction
|
|
// of stack growth -- so it's always nonnegative.
|
|
int LocalAreaOffset = TFI.getOffsetOfLocalArea();
|
|
if (StackGrowsDown)
|
|
LocalAreaOffset = -LocalAreaOffset;
|
|
assert(LocalAreaOffset >= 0
|
|
&& "Local area offset should be in direction of stack growth");
|
|
int64_t Offset = LocalAreaOffset;
|
|
|
|
// If there are fixed sized objects that are preallocated in the local area,
|
|
// non-fixed objects can't be allocated right at the start of local area.
|
|
// We currently don't support filling in holes in between fixed sized
|
|
// objects, so we adjust 'Offset' to point to the end of last fixed sized
|
|
// preallocated object.
|
|
for (int i = MFI->getObjectIndexBegin(); i != 0; ++i) {
|
|
int64_t FixedOff;
|
|
if (StackGrowsDown) {
|
|
// The maximum distance from the stack pointer is at lower address of
|
|
// the object -- which is given by offset. For down growing stack
|
|
// the offset is negative, so we negate the offset to get the distance.
|
|
FixedOff = -MFI->getObjectOffset(i);
|
|
} else {
|
|
// The maximum distance from the start pointer is at the upper
|
|
// address of the object.
|
|
FixedOff = MFI->getObjectOffset(i) + MFI->getObjectSize(i);
|
|
}
|
|
if (FixedOff > Offset) Offset = FixedOff;
|
|
}
|
|
|
|
// First assign frame offsets to stack objects that are used to spill
|
|
// callee saved registers.
|
|
if (StackGrowsDown) {
|
|
for (unsigned i = MinCSFrameIndex; i <= MaxCSFrameIndex; ++i) {
|
|
// If the stack grows down, we need to add the size to find the lowest
|
|
// address of the object.
|
|
Offset += MFI->getObjectSize(i);
|
|
|
|
unsigned Align = MFI->getObjectAlignment(i);
|
|
// Adjust to alignment boundary
|
|
Offset = (Offset+Align-1)/Align*Align;
|
|
|
|
MFI->setObjectOffset(i, -Offset); // Set the computed offset
|
|
}
|
|
} else {
|
|
int MaxCSFI = MaxCSFrameIndex, MinCSFI = MinCSFrameIndex;
|
|
for (int i = MaxCSFI; i >= MinCSFI ; --i) {
|
|
unsigned Align = MFI->getObjectAlignment(i);
|
|
// Adjust to alignment boundary
|
|
Offset = (Offset+Align-1)/Align*Align;
|
|
|
|
MFI->setObjectOffset(i, Offset);
|
|
Offset += MFI->getObjectSize(i);
|
|
}
|
|
}
|
|
|
|
unsigned MaxAlign = MFI->getMaxAlignment();
|
|
|
|
// Make sure the special register scavenging spill slot is closest to the
|
|
// incoming stack pointer if a frame pointer is required and is closer
|
|
// to the incoming rather than the final stack pointer.
|
|
const TargetRegisterInfo *RegInfo = Fn.getSubtarget().getRegisterInfo();
|
|
bool EarlyScavengingSlots = (TFI.hasFP(Fn) &&
|
|
TFI.isFPCloseToIncomingSP() &&
|
|
RegInfo->useFPForScavengingIndex(Fn) &&
|
|
!RegInfo->needsStackRealignment(Fn));
|
|
if (RS && EarlyScavengingSlots) {
|
|
SmallVector<int, 2> SFIs;
|
|
RS->getScavengingFrameIndices(SFIs);
|
|
for (SmallVectorImpl<int>::iterator I = SFIs.begin(),
|
|
IE = SFIs.end(); I != IE; ++I)
|
|
AdjustStackOffset(MFI, *I, StackGrowsDown, Offset, MaxAlign);
|
|
}
|
|
|
|
// FIXME: Once this is working, then enable flag will change to a target
|
|
// check for whether the frame is large enough to want to use virtual
|
|
// frame index registers. Functions which don't want/need this optimization
|
|
// will continue to use the existing code path.
|
|
if (MFI->getUseLocalStackAllocationBlock()) {
|
|
unsigned Align = MFI->getLocalFrameMaxAlign();
|
|
|
|
// Adjust to alignment boundary.
|
|
Offset = (Offset + Align - 1) / Align * Align;
|
|
|
|
DEBUG(dbgs() << "Local frame base offset: " << Offset << "\n");
|
|
|
|
// Resolve offsets for objects in the local block.
|
|
for (unsigned i = 0, e = MFI->getLocalFrameObjectCount(); i != e; ++i) {
|
|
std::pair<int, int64_t> Entry = MFI->getLocalFrameObjectMap(i);
|
|
int64_t FIOffset = (StackGrowsDown ? -Offset : Offset) + Entry.second;
|
|
DEBUG(dbgs() << "alloc FI(" << Entry.first << ") at SP[" <<
|
|
FIOffset << "]\n");
|
|
MFI->setObjectOffset(Entry.first, FIOffset);
|
|
}
|
|
// Allocate the local block
|
|
Offset += MFI->getLocalFrameSize();
|
|
|
|
MaxAlign = std::max(Align, MaxAlign);
|
|
}
|
|
|
|
// Make sure that the stack protector comes before the local variables on the
|
|
// stack.
|
|
SmallSet<int, 16> ProtectedObjs;
|
|
if (MFI->getStackProtectorIndex() >= 0) {
|
|
StackObjSet LargeArrayObjs;
|
|
StackObjSet SmallArrayObjs;
|
|
StackObjSet AddrOfObjs;
|
|
|
|
AdjustStackOffset(MFI, MFI->getStackProtectorIndex(), StackGrowsDown,
|
|
Offset, MaxAlign);
|
|
|
|
// Assign large stack objects first.
|
|
for (unsigned i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) {
|
|
if (MFI->isObjectPreAllocated(i) &&
|
|
MFI->getUseLocalStackAllocationBlock())
|
|
continue;
|
|
if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
|
|
continue;
|
|
if (RS && RS->isScavengingFrameIndex((int)i))
|
|
continue;
|
|
if (MFI->isDeadObjectIndex(i))
|
|
continue;
|
|
if (MFI->getStackProtectorIndex() == (int)i)
|
|
continue;
|
|
|
|
switch (SP->getSSPLayout(MFI->getObjectAllocation(i))) {
|
|
case StackProtector::SSPLK_None:
|
|
continue;
|
|
case StackProtector::SSPLK_SmallArray:
|
|
SmallArrayObjs.insert(i);
|
|
continue;
|
|
case StackProtector::SSPLK_AddrOf:
|
|
AddrOfObjs.insert(i);
|
|
continue;
|
|
case StackProtector::SSPLK_LargeArray:
|
|
LargeArrayObjs.insert(i);
|
|
continue;
|
|
}
|
|
llvm_unreachable("Unexpected SSPLayoutKind.");
|
|
}
|
|
|
|
AssignProtectedObjSet(LargeArrayObjs, ProtectedObjs, MFI, StackGrowsDown,
|
|
Offset, MaxAlign);
|
|
AssignProtectedObjSet(SmallArrayObjs, ProtectedObjs, MFI, StackGrowsDown,
|
|
Offset, MaxAlign);
|
|
AssignProtectedObjSet(AddrOfObjs, ProtectedObjs, MFI, StackGrowsDown,
|
|
Offset, MaxAlign);
|
|
}
|
|
|
|
// Then assign frame offsets to stack objects that are not used to spill
|
|
// callee saved registers.
|
|
for (unsigned i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) {
|
|
if (MFI->isObjectPreAllocated(i) &&
|
|
MFI->getUseLocalStackAllocationBlock())
|
|
continue;
|
|
if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
|
|
continue;
|
|
if (RS && RS->isScavengingFrameIndex((int)i))
|
|
continue;
|
|
if (MFI->isDeadObjectIndex(i))
|
|
continue;
|
|
if (MFI->getStackProtectorIndex() == (int)i)
|
|
continue;
|
|
if (ProtectedObjs.count(i))
|
|
continue;
|
|
|
|
AdjustStackOffset(MFI, i, StackGrowsDown, Offset, MaxAlign);
|
|
}
|
|
|
|
// Make sure the special register scavenging spill slot is closest to the
|
|
// stack pointer.
|
|
if (RS && !EarlyScavengingSlots) {
|
|
SmallVector<int, 2> SFIs;
|
|
RS->getScavengingFrameIndices(SFIs);
|
|
for (SmallVectorImpl<int>::iterator I = SFIs.begin(),
|
|
IE = SFIs.end(); I != IE; ++I)
|
|
AdjustStackOffset(MFI, *I, StackGrowsDown, Offset, MaxAlign);
|
|
}
|
|
|
|
if (!TFI.targetHandlesStackFrameRounding()) {
|
|
// If we have reserved argument space for call sites in the function
|
|
// immediately on entry to the current function, count it as part of the
|
|
// overall stack size.
|
|
if (MFI->adjustsStack() && TFI.hasReservedCallFrame(Fn))
|
|
Offset += MFI->getMaxCallFrameSize();
|
|
|
|
// Round up the size to a multiple of the alignment. If the function has
|
|
// any calls or alloca's, align to the target's StackAlignment value to
|
|
// ensure that the callee's frame or the alloca data is suitably aligned;
|
|
// otherwise, for leaf functions, align to the TransientStackAlignment
|
|
// value.
|
|
unsigned StackAlign;
|
|
if (MFI->adjustsStack() || MFI->hasVarSizedObjects() ||
|
|
(RegInfo->needsStackRealignment(Fn) && MFI->getObjectIndexEnd() != 0))
|
|
StackAlign = TFI.getStackAlignment();
|
|
else
|
|
StackAlign = TFI.getTransientStackAlignment();
|
|
|
|
// If the frame pointer is eliminated, all frame offsets will be relative to
|
|
// SP not FP. Align to MaxAlign so this works.
|
|
StackAlign = std::max(StackAlign, MaxAlign);
|
|
unsigned AlignMask = StackAlign - 1;
|
|
Offset = (Offset + AlignMask) & ~uint64_t(AlignMask);
|
|
}
|
|
|
|
// Update frame info to pretend that this is part of the stack...
|
|
int64_t StackSize = Offset - LocalAreaOffset;
|
|
MFI->setStackSize(StackSize);
|
|
NumBytesStackSpace += StackSize;
|
|
}
|
|
|
|
/// insertPrologEpilogCode - Scan the function for modified callee saved
|
|
/// registers, insert spill code for these callee saved registers, then add
|
|
/// prolog and epilog code to the function.
|
|
///
|
|
void PEI::insertPrologEpilogCode(MachineFunction &Fn) {
|
|
const TargetFrameLowering &TFI = *Fn.getSubtarget().getFrameLowering();
|
|
|
|
// Add prologue to the function...
|
|
TFI.emitPrologue(Fn);
|
|
|
|
// Add epilogue to restore the callee-save registers in each exiting block
|
|
for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
|
|
// If last instruction is a return instruction, add an epilogue
|
|
if (!I->empty() && I->back().isReturn())
|
|
TFI.emitEpilogue(Fn, *I);
|
|
}
|
|
|
|
// Emit additional code that is required to support segmented stacks, if
|
|
// we've been asked for it. This, when linked with a runtime with support
|
|
// for segmented stacks (libgcc is one), will result in allocating stack
|
|
// space in small chunks instead of one large contiguous block.
|
|
if (Fn.shouldSplitStack())
|
|
TFI.adjustForSegmentedStacks(Fn);
|
|
|
|
// Emit additional code that is required to explicitly handle the stack in
|
|
// HiPE native code (if needed) when loaded in the Erlang/OTP runtime. The
|
|
// approach is rather similar to that of Segmented Stacks, but it uses a
|
|
// different conditional check and another BIF for allocating more stack
|
|
// space.
|
|
if (Fn.getFunction()->getCallingConv() == CallingConv::HiPE)
|
|
TFI.adjustForHiPEPrologue(Fn);
|
|
}
|
|
|
|
/// replaceFrameIndices - Replace all MO_FrameIndex operands with physical
|
|
/// register references and actual offsets.
|
|
///
|
|
void PEI::replaceFrameIndices(MachineFunction &Fn) {
|
|
const TargetFrameLowering &TFI = *Fn.getSubtarget().getFrameLowering();
|
|
if (!TFI.needsFrameIndexResolution(Fn)) return;
|
|
|
|
// Store SPAdj at exit of a basic block.
|
|
SmallVector<int, 8> SPState;
|
|
SPState.resize(Fn.getNumBlockIDs());
|
|
SmallPtrSet<MachineBasicBlock*, 8> Reachable;
|
|
|
|
// Iterate over the reachable blocks in DFS order.
|
|
for (auto DFI = df_ext_begin(&Fn, Reachable), DFE = df_ext_end(&Fn, Reachable);
|
|
DFI != DFE; ++DFI) {
|
|
int SPAdj = 0;
|
|
// Check the exit state of the DFS stack predecessor.
|
|
if (DFI.getPathLength() >= 2) {
|
|
MachineBasicBlock *StackPred = DFI.getPath(DFI.getPathLength() - 2);
|
|
assert(Reachable.count(StackPred) &&
|
|
"DFS stack predecessor is already visited.\n");
|
|
SPAdj = SPState[StackPred->getNumber()];
|
|
}
|
|
MachineBasicBlock *BB = *DFI;
|
|
replaceFrameIndices(BB, Fn, SPAdj);
|
|
SPState[BB->getNumber()] = SPAdj;
|
|
}
|
|
|
|
// Handle the unreachable blocks.
|
|
for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) {
|
|
if (Reachable.count(BB))
|
|
// Already handled in DFS traversal.
|
|
continue;
|
|
int SPAdj = 0;
|
|
replaceFrameIndices(BB, Fn, SPAdj);
|
|
}
|
|
}
|
|
|
|
void PEI::replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &Fn,
|
|
int &SPAdj) {
|
|
assert(Fn.getSubtarget().getRegisterInfo() &&
|
|
"getRegisterInfo() must be implemented!");
|
|
const TargetInstrInfo &TII = *Fn.getSubtarget().getInstrInfo();
|
|
const TargetRegisterInfo &TRI = *Fn.getSubtarget().getRegisterInfo();
|
|
const TargetFrameLowering *TFI = Fn.getSubtarget().getFrameLowering();
|
|
int FrameSetupOpcode = TII.getCallFrameSetupOpcode();
|
|
int FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
|
|
|
|
if (RS && !FrameIndexVirtualScavenging) RS->enterBasicBlock(BB);
|
|
|
|
bool InsideCallSequence = false;
|
|
|
|
for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
|
|
|
|
if (I->getOpcode() == FrameSetupOpcode ||
|
|
I->getOpcode() == FrameDestroyOpcode) {
|
|
InsideCallSequence = (I->getOpcode() == FrameSetupOpcode);
|
|
SPAdj += TII.getSPAdjust(I);
|
|
|
|
MachineBasicBlock::iterator PrevI = BB->end();
|
|
if (I != BB->begin()) PrevI = std::prev(I);
|
|
TFI->eliminateCallFramePseudoInstr(Fn, *BB, I);
|
|
|
|
// Visit the instructions created by eliminateCallFramePseudoInstr().
|
|
if (PrevI == BB->end())
|
|
I = BB->begin(); // The replaced instr was the first in the block.
|
|
else
|
|
I = std::next(PrevI);
|
|
continue;
|
|
}
|
|
|
|
MachineInstr *MI = I;
|
|
bool DoIncr = true;
|
|
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
|
|
if (!MI->getOperand(i).isFI())
|
|
continue;
|
|
|
|
// Frame indicies in debug values are encoded in a target independent
|
|
// way with simply the frame index and offset rather than any
|
|
// target-specific addressing mode.
|
|
if (MI->isDebugValue()) {
|
|
assert(i == 0 && "Frame indicies can only appear as the first "
|
|
"operand of a DBG_VALUE machine instruction");
|
|
unsigned Reg;
|
|
MachineOperand &Offset = MI->getOperand(1);
|
|
Offset.setImm(Offset.getImm() +
|
|
TFI->getFrameIndexReference(
|
|
Fn, MI->getOperand(0).getIndex(), Reg));
|
|
MI->getOperand(0).ChangeToRegister(Reg, false /*isDef*/);
|
|
continue;
|
|
}
|
|
|
|
// TODO: This code should be commoned with the code for
|
|
// PATCHPOINT. There's no good reason for the difference in
|
|
// implementation other than historical accident. The only
|
|
// remaining difference is the unconditional use of the stack
|
|
// pointer as the base register.
|
|
if (MI->getOpcode() == TargetOpcode::STATEPOINT) {
|
|
assert((!MI->isDebugValue() || i == 0) &&
|
|
"Frame indicies can only appear as the first operand of a "
|
|
"DBG_VALUE machine instruction");
|
|
unsigned Reg;
|
|
MachineOperand &Offset = MI->getOperand(i + 1);
|
|
const unsigned refOffset =
|
|
TFI->getFrameIndexReferenceFromSP(Fn, MI->getOperand(i).getIndex(),
|
|
Reg);
|
|
|
|
Offset.setImm(Offset.getImm() + refOffset);
|
|
MI->getOperand(i).ChangeToRegister(Reg, false /*isDef*/);
|
|
continue;
|
|
}
|
|
|
|
// Frame allocations are target independent. Simply swap the index with
|
|
// the offset.
|
|
if (MI->getOpcode() == TargetOpcode::FRAME_ALLOC) {
|
|
assert(TFI->hasFP(Fn) && "frame alloc requires FP");
|
|
MachineOperand &FI = MI->getOperand(i);
|
|
unsigned Reg;
|
|
int FrameOffset = TFI->getFrameIndexReference(Fn, FI.getIndex(), Reg);
|
|
FI.ChangeToImmediate(FrameOffset);
|
|
continue;
|
|
}
|
|
|
|
// Some instructions (e.g. inline asm instructions) can have
|
|
// multiple frame indices and/or cause eliminateFrameIndex
|
|
// to insert more than one instruction. We need the register
|
|
// scavenger to go through all of these instructions so that
|
|
// it can update its register information. We keep the
|
|
// iterator at the point before insertion so that we can
|
|
// revisit them in full.
|
|
bool AtBeginning = (I == BB->begin());
|
|
if (!AtBeginning) --I;
|
|
|
|
// If this instruction has a FrameIndex operand, we need to
|
|
// use that target machine register info object to eliminate
|
|
// it.
|
|
TRI.eliminateFrameIndex(MI, SPAdj, i,
|
|
FrameIndexVirtualScavenging ? nullptr : RS);
|
|
|
|
// Reset the iterator if we were at the beginning of the BB.
|
|
if (AtBeginning) {
|
|
I = BB->begin();
|
|
DoIncr = false;
|
|
}
|
|
|
|
MI = nullptr;
|
|
break;
|
|
}
|
|
|
|
// If we are looking at a call sequence, we need to keep track of
|
|
// the SP adjustment made by each instruction in the sequence.
|
|
// This includes both the frame setup/destroy pseudos (handled above),
|
|
// as well as other instructions that have side effects w.r.t the SP.
|
|
// Note that this must come after eliminateFrameIndex, because
|
|
// if I itself referred to a frame index, we shouldn't count its own
|
|
// adjustment.
|
|
if (MI && InsideCallSequence)
|
|
SPAdj += TII.getSPAdjust(MI);
|
|
|
|
if (DoIncr && I != BB->end()) ++I;
|
|
|
|
// Update register states.
|
|
if (RS && !FrameIndexVirtualScavenging && MI) RS->forward(MI);
|
|
}
|
|
}
|
|
|
|
/// scavengeFrameVirtualRegs - Replace all frame index virtual registers
|
|
/// with physical registers. Use the register scavenger to find an
|
|
/// appropriate register to use.
|
|
///
|
|
/// FIXME: Iterating over the instruction stream is unnecessary. We can simply
|
|
/// iterate over the vreg use list, which at this point only contains machine
|
|
/// operands for which eliminateFrameIndex need a new scratch reg.
|
|
void
|
|
PEI::scavengeFrameVirtualRegs(MachineFunction &Fn) {
|
|
// Run through the instructions and find any virtual registers.
|
|
for (MachineFunction::iterator BB = Fn.begin(),
|
|
E = Fn.end(); BB != E; ++BB) {
|
|
RS->enterBasicBlock(BB);
|
|
|
|
int SPAdj = 0;
|
|
|
|
// The instruction stream may change in the loop, so check BB->end()
|
|
// directly.
|
|
for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
|
|
// We might end up here again with a NULL iterator if we scavenged a
|
|
// register for which we inserted spill code for definition by what was
|
|
// originally the first instruction in BB.
|
|
if (I == MachineBasicBlock::iterator(nullptr))
|
|
I = BB->begin();
|
|
|
|
MachineInstr *MI = I;
|
|
MachineBasicBlock::iterator J = std::next(I);
|
|
MachineBasicBlock::iterator P =
|
|
I == BB->begin() ? MachineBasicBlock::iterator(nullptr)
|
|
: std::prev(I);
|
|
|
|
// RS should process this instruction before we might scavenge at this
|
|
// location. This is because we might be replacing a virtual register
|
|
// defined by this instruction, and if so, registers killed by this
|
|
// instruction are available, and defined registers are not.
|
|
RS->forward(I);
|
|
|
|
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
|
|
if (MI->getOperand(i).isReg()) {
|
|
MachineOperand &MO = MI->getOperand(i);
|
|
unsigned Reg = MO.getReg();
|
|
if (Reg == 0)
|
|
continue;
|
|
if (!TargetRegisterInfo::isVirtualRegister(Reg))
|
|
continue;
|
|
|
|
// When we first encounter a new virtual register, it
|
|
// must be a definition.
|
|
assert(MI->getOperand(i).isDef() &&
|
|
"frame index virtual missing def!");
|
|
// Scavenge a new scratch register
|
|
const TargetRegisterClass *RC = Fn.getRegInfo().getRegClass(Reg);
|
|
unsigned ScratchReg = RS->scavengeRegister(RC, J, SPAdj);
|
|
|
|
++NumScavengedRegs;
|
|
|
|
// Replace this reference to the virtual register with the
|
|
// scratch register.
|
|
assert (ScratchReg && "Missing scratch register!");
|
|
MachineRegisterInfo &MRI = Fn.getRegInfo();
|
|
Fn.getRegInfo().replaceRegWith(Reg, ScratchReg);
|
|
|
|
// Make sure MRI now accounts this register as used.
|
|
MRI.setPhysRegUsed(ScratchReg);
|
|
|
|
// Because this instruction was processed by the RS before this
|
|
// register was allocated, make sure that the RS now records the
|
|
// register as being used.
|
|
RS->setRegUsed(ScratchReg);
|
|
}
|
|
}
|
|
|
|
// If the scavenger needed to use one of its spill slots, the
|
|
// spill code will have been inserted in between I and J. This is a
|
|
// problem because we need the spill code before I: Move I to just
|
|
// prior to J.
|
|
if (I != std::prev(J)) {
|
|
BB->splice(J, BB, I);
|
|
|
|
// Before we move I, we need to prepare the RS to visit I again.
|
|
// Specifically, RS will assert if it sees uses of registers that
|
|
// it believes are undefined. Because we have already processed
|
|
// register kills in I, when it visits I again, it will believe that
|
|
// those registers are undefined. To avoid this situation, unprocess
|
|
// the instruction I.
|
|
assert(RS->getCurrentPosition() == I &&
|
|
"The register scavenger has an unexpected position");
|
|
I = P;
|
|
RS->unprocess(P);
|
|
} else
|
|
++I;
|
|
}
|
|
}
|
|
}
|