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llvm-6502/test/CodeGen
Tom Stellard 1d44baacf1 Merging r227990:
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r227990 | marek.olsak | 2015-02-03 12:38:12 -0500 (Tue, 03 Feb 2015) | 14 lines

R600/SI: Don't generate non-existent LSHL, LSHR, ASHR B32 variants on VI

This can happen when a REV instruction is commuted.

The trick is not to define the _vi versions of instructions, which has these
consequences:
- code generation will always fail if a pseudo cannot be lowered
  (very useful to catch bugs where an unsupported instruction somehow makes
   it to the printer)
- ability to query if a pseudo can be lowered, which is done in commuteOpcode
  to prevent REV from commuting to non-REV on VI

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@235317 91177308-0d34-0410-b5e6-96231b3b80d8
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