llvm-6502/lib/CodeGen/SelectionDAG
Chris Lattner 1d6373c1af teach selection dag mask tracking about the fact that select_cc operates like
select.  Also teach it that the bit count instructions can only set the low bits
of the result, depending on the size of the input.

This allows us to compile this:

int %eq0(int %a) {
        %tmp.1 = seteq int %a, 0                ; <bool> [#uses=1]
        %tmp.2 = cast bool %tmp.1 to int                ; <int> [#uses=1]
        ret int %tmp.2
}

To this:

_eq0:
        cntlzw r2, r3
        srwi r3, r2, 5
        blr

instead of this:

_eq0:
        cntlzw r2, r3
        rlwinm r3, r2, 27, 31, 31
        blr

when setcc is marked illegal on ppc (which restores parity to non-illegal
setcc).  Thanks to Nate for pointing this out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23013 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-24 16:46:55 +00:00
..
LegalizeDAG.cpp Start using isOperationLegal and isTypeLegal to simplify the code 2005-08-24 16:35:28 +00:00
Makefile Change Library Names Not To Conflict With Others When Installed 2004-10-27 23:18:45 +00:00
ScheduleDAG.cpp Add a fast-path for register values. Add support for constant pool entries, 2005-08-22 01:04:32 +00:00
SelectionDAG.cpp teach selection dag mask tracking about the fact that select_cc operates like 2005-08-24 16:46:55 +00:00
SelectionDAGISel.cpp Make -view-isel-dags show the dag before instruction selecting, in case 2005-08-24 00:34:29 +00:00
SelectionDAGPrinter.cpp Print physreg register nodes with target names (e.g. F1) instead of numbers 2005-08-19 21:21:16 +00:00
TargetLowering.cpp Adjust to new interface 2005-08-24 16:34:12 +00:00