Chris Lattner 09e4b7e1b7 memory operands that have a direct operand should have their stores created ... before the copies into physregs are done. This avoids having flag operands skip the store, causing cycles in the dag at sched time. This fixes infinite loops on these tests: test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll for PR1308 test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll for PR828 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36547 91177308-0d34-0410-b5e6-96231b3b80d8		2007-04-28 21:12:06 +00:00
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CallingConvLower.cpp	add methods for analysis of call results and return nodes.	2007-02-28 07:09:40 +00:00
DAGCombiner.cpp	PR400 phase 2. Propagate attributed load/store information through DAGs.	2007-04-22 23:15:30 +00:00
LegalizeDAG.cpp	memory inputs to an inline asm are required to have an address available.	2007-04-28 06:42:38 +00:00
Makefile	For PR780:	2006-07-26 16:18:00 +00:00
ScheduleDAG.cpp	Fix some VC++ warnings.	2007-03-20 20:43:18 +00:00
ScheduleDAGList.cpp	switch the sched unit map over to use a DenseMap instead of std::map. This	2007-02-03 01:34:13 +00:00
ScheduleDAGRRList.cpp	Fix a typo in a comment.	2007-04-26 19:40:56 +00:00
ScheduleDAGSimple.cpp	Removed tabs everywhere except autogenerated & external files. Add make	2007-04-16 18:10:23 +00:00
SelectionDAG.cpp	Be more careful about folding op(x, undef) when we have vector operands.	2007-04-25 00:00:45 +00:00
SelectionDAGISel.cpp	memory operands that have a direct operand should have their stores created	2007-04-28 21:12:06 +00:00
SelectionDAGPrinter.cpp	Removing even more <iostream> includes.	2006-12-07 20:04:42 +00:00
TargetLowering.cpp	fix a pasto	2007-04-18 03:01:40 +00:00