llvm-6502/lib/CodeGen/CMakeLists.txt
Dan Gohman 343f0c0467 Experimental post-pass scheduling support. Post-pass scheduling
is currently off by default, and can be enabled with
-disable-post-RA-scheduler=false.

This doesn't have a significant impact on most code yet because it doesn't
yet do anything to address anti-dependencies and it doesn't attempt to
disambiguate memory references. Also, several popular targets
don't have pipeline descriptions yet.

The majority of the changes here are splitting the SelectionDAG-specific
code out of ScheduleDAG, so that ScheduleDAG can be moved to
libLLVMCodeGen.a. The interface between ScheduleDAG-using code and
the rest of the scheduling code is somewhat rough and will evolve.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59676 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19 23:18:57 +00:00

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1.2 KiB
CMake

add_llvm_library(LLVMCodeGen
BranchFolding.cpp
DeadMachineInstructionElim.cpp
ELFWriter.cpp
GCMetadata.cpp
GCMetadataPrinter.cpp
GCStrategy.cpp
IfConversion.cpp
IntrinsicLowering.cpp
LLVMTargetMachine.cpp
LatencyPriorityQueue.cpp
LiveInterval.cpp
LiveIntervalAnalysis.cpp
LiveStackAnalysis.cpp
LiveVariables.cpp
LoopAligner.cpp
LowerSubregs.cpp
MachOWriter.cpp
MachineBasicBlock.cpp
MachineDominators.cpp
MachineFunction.cpp
MachineInstr.cpp
MachineLICM.cpp
MachineLoopInfo.cpp
MachineModuleInfo.cpp
MachinePassRegistry.cpp
MachineRegisterInfo.cpp
MachineSink.cpp
OcamlGC.cpp
PBQP.cpp
PHIElimination.cpp
Passes.cpp
PostRASchedulerList.cpp
PreAllocSplitting.cpp
PrologEpilogInserter.cpp
PseudoSourceValue.cpp
RegAllocBigBlock.cpp
RegAllocLinearScan.cpp
RegAllocLocal.cpp
RegAllocPBQP.cpp
RegAllocSimple.cpp
RegisterCoalescer.cpp
RegisterScavenging.cpp
ScheduleDAG.cpp
ScheduleDAGEmit.cpp
ScheduleDAGInstrs.cpp
ScheduleDAGPrinter.cpp
ShadowStackGC.cpp
SimpleRegisterCoalescing.cpp
StackProtector.cpp
StackSlotColoring.cpp
StrongPHIElimination.cpp
TargetInstrInfoImpl.cpp
TwoAddressInstructionPass.cpp
UnreachableBlockElim.cpp
VirtRegMap.cpp
)