llvm-6502/test/CodeGen
Andrea Di Biagio 89cea3c36b [DAGCombiner] Improve the folding of target independet shuffles to Undef.
When combining a pair of shuffle nodes, check if the combined shuffle mask is
trivially Undef. In case, immediately fold that pair of shuffles to Undef.

The lack of checks for undef masks was the root-cause of a poor-codegen bug
in the dag combiner.

Example:
  %1 = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> <i32 4, i32 1, i32 1, i32 6>
  %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 6>
  %3 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 3>

Before this patch, on x86 (with -mcpu=corei7) we failed to fold the entire
sequence to Undef value and therefore we generated:
  shufps $-123, %xmm1, $xmm0
  pshufd $-46, %xmm0, %xmm0

With this patch, the entire shuffle sequence is folded to Undef and no
shuffles are generated in the output assembly.

Added new test cases to test 'combine-vec-shuffle-5.ll'.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215797 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-16 00:29:44 +00:00
..
AArch64 [AArch64] Narrow arguments passed in wrong position on the stack in 2014-08-15 14:29:57 +00:00
ARM [AArch32] Add support for FP rounding operations for ARMv8/AArch32. 2014-08-15 21:38:16 +00:00
CPP IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
Generic Use "weak alias" instead of "alias weak" 2014-07-30 22:51:54 +00:00
Hexagon DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range. 2014-08-06 00:21:25 +00:00
Inputs
Mips [mips] Improve robustness of some tests. 2014-08-14 13:10:48 +00:00
MSP430
NVPTX [NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types 2014-07-23 20:23:49 +00:00
PowerPC [PowerPC] Mark fixed-offset byvals as pointed-to by IR values 2014-08-16 00:17:05 +00:00
R600 R600/SI: Move all fabs / fneg handling to patterns 2014-08-15 18:42:22 +00:00
SPARC IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
SystemZ IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
Thumb ARM: Fix and re-enable load/store optimizer for Thumb1. 2014-08-15 17:00:30 +00:00
Thumb2 ARM: do not generate BLX instructions on Cortex-M CPUs. 2014-08-06 11:13:14 +00:00
X86 [DAGCombiner] Improve the folding of target independet shuffles to Undef. 2014-08-16 00:29:44 +00:00
XCore llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32. 2014-07-04 11:58:03 +00:00