Tim Northover 1dad6937c5 AArch64: don't be too greedy when folding :lo12: accesses into mem ops. ... This frequently leads to cases like: ldr xD, [xN, :lo12:var] add xA, xN, :lo12:var ldr xD, [xA, #8] where the ADD would have been needed anyway, and the two distinct addressing modes can prevent the formation of an ldp. Because of how we handle ADRP (aggressively forming an ADRP/ADD pseudo-inst at ISel time), this pattern also results in duplicated ADRP instructions (one on its own to cover the ldr, and one combined with the add). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223172 91177308-0d34-0410-b5e6-96231b3b80d8		2014-12-02 23:13:39 +00:00
..
AsmParser	Remove StringMap::GetOrCreateValue in favor of StringMap::insert	2014-11-19 05:49:42 +00:00
Disassembler	Pass an ArrayRef to MCDisassembler::getInstruction.	2014-11-12 02:04:27 +00:00
InstPrinter	[AArch64] Allow access to all system registers with MRS/MSR instructions.	2014-10-01 10:13:59 +00:00
MCTargetDesc	Fix capitalization. NFC.	2014-12-01 06:14:52 +00:00
TargetInfo
Utils	[AArch64] Allow access to all system registers with MRS/MSR instructions.	2014-10-01 10:13:59 +00:00
AArch64.h	[AArch64] Add workaround for Cortex-A53 erratum (835769)	2014-10-13 10:12:35 +00:00
AArch64.td
AArch64A53Fix835769.cpp	[AArch64] Fix crash with empty/pseudo-only blocks in A53 erratum (835769) workaround	2014-10-14 14:02:41 +00:00
AArch64A57FPLoadBalancing.cpp	[AArch64] Fix clobber computation in A57LoadBalancing pass.	2014-11-24 18:57:58 +00:00
AArch64AddressTypePromotion.cpp
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp	[AArch64][Stackmaps] Optimize stackmap shadows on AArch64.	2014-12-02 21:36:24 +00:00
AArch64BranchRelaxation.cpp
AArch64CallingConvention.h	AArch64: make register block rules apply to vector types too.	2014-12-02 17:15:22 +00:00
AArch64CallingConvention.td	AArch64: treat [N x Ty] as a block during procedure calls.	2014-11-27 21:02:42 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
AArch64CollectLOH.cpp
AArch64ConditionalCompares.cpp	Change MCSchedModel to be a struct of statically initialized data.	2014-09-02 17:43:54 +00:00
AArch64ConditionOptimizer.cpp	[AArch64] Check Dest Register Liveness in CondOpt pass.	2014-10-31 19:02:38 +00:00
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp
AArch64FastISel.cpp	AArch64: treat [N x Ty] as a block during procedure calls.	2014-11-27 21:02:42 +00:00
AArch64FrameLowering.cpp	[Stackmaps] Make ithe frame-pointer required for stackmaps.	2014-10-02 22:21:49 +00:00
AArch64FrameLowering.h
AArch64InstrAtomics.td
AArch64InstrFormats.td	Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.	2014-11-26 00:46:26 +00:00
AArch64InstrInfo.cpp	[AArch64] Don't optimize all compare instructions.	2014-11-18 21:02:40 +00:00
AArch64InstrInfo.h	AArch64InstrInfo.h: Fix a warning introduced in clang r220703. [-Winconsistent-missing-override]	2014-10-27 23:29:27 +00:00
AArch64InstrInfo.td	Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.	2014-11-26 00:46:26 +00:00
AArch64ISelDAGToDAG.cpp	AArch64: don't be too greedy when folding :lo12: accesses into mem ops.	2014-12-02 23:13:39 +00:00
AArch64ISelLowering.cpp	[AArch64] Don't combine "select (setcc i1 LHS, RHS), vL, vR".	2014-12-01 20:59:00 +00:00
AArch64ISelLowering.h	Add missing 'override' keyword.	2014-11-28 03:58:26 +00:00
AArch64LoadStoreOptimizer.cpp
AArch64MachineCombinerPattern.h
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp	[PBQP] Unique allowed-sets for nodes in the PBQP graph and use pairs of these	2014-10-27 17:44:25 +00:00
AArch64PBQPRegAlloc.h	[AArch64] Cleanup A57PBQPConstraints	2014-10-22 12:40:20 +00:00
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp	Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool>	2014-11-19 07:49:26 +00:00
AArch64RegisterInfo.cpp
AArch64RegisterInfo.h
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td	[AArch64] Enable partial & runtime unrolling on cortex-a57.	2014-10-09 10:13:27 +00:00
AArch64SchedA57WriteRes.td	[AArch64] Refines the Cortex-A57 Machine Model	2014-09-29 21:27:36 +00:00
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp	Change MCSchedModel to be a struct of statically initialized data.	2014-09-02 17:43:54 +00:00
AArch64Subtarget.cpp	Remove redundant calls to isMaterializable.	2014-11-01 16:46:18 +00:00
AArch64Subtarget.h	[AArch64] Disable useAA for Cortex-A57.	2014-11-19 06:48:56 +00:00
AArch64TargetMachine.cpp	Add out of line virtual destructors to all LLVMTargetMachine subclasses	2014-11-20 23:37:18 +00:00
AArch64TargetMachine.h	Add out of line virtual destructors to all LLVMTargetMachine subclasses	2014-11-20 23:37:18 +00:00
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp	[AArch64] Enable partial & runtime unrolling on cortex-a57.	2014-10-09 10:13:27 +00:00
CMakeLists.txt	[AArch64] Add workaround for Cortex-A53 erratum (835769)	2014-10-13 10:12:35 +00:00
LLVMBuild.txt
Makefile