llvm-6502/test/CodeGen
Kit Barton 1ebbc68719 [PPC] Implement vmrgew and vmrgow instructions
This patch adds support for the vector merge even word and vector merge odd word
instructions introduced in POWER8.

Phabricator review: http://reviews.llvm.org/D10704


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240650 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 15:17:40 +00:00
..
AArch64 Fix "the the" in comments. 2015-06-19 01:53:21 +00:00
AMDGPU R600/SI: Use ELF64 format instead of ELF32 2015-06-22 21:03:54 +00:00
ARM ARMLoadStoreOptimizer: Fix errata 602117 handling and make testcase actually test for it 2015-06-24 20:03:27 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Mips Fix "the the" in comments. 2015-06-19 01:53:21 +00:00
MIR MIR Serialization: Serialize simple MachineRegisterInfo attributes. 2015-06-24 19:56:10 +00:00
MSP430
NVPTX Add NVPTXPeephole pass to reduce unnecessary address cast 2015-06-24 20:20:16 +00:00
PowerPC [PPC] Implement vmrgew and vmrgow instructions 2015-06-25 15:17:40 +00:00
SPARC Revert r240302 ("Bring r240130 back."). 2015-06-23 11:31:32 +00:00
SystemZ
Thumb
Thumb2 ARMLoadStoreOptimizer: Fix errata 602117 handling and make testcase actually test for it 2015-06-24 20:03:27 +00:00
WinEH
X86 [X86] Accept hasAVX512() as well as hasFMA() when generating FMA. 2015-06-25 00:44:46 +00:00
XCore