llvm-6502/test/CodeGen/SPARC
Dan Gohman ae3a0be92e Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:49:04 +00:00
..
2006-01-22-BitConvertLegalize.ll Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
2007-05-09-JumpTables.ll
2007-07-05-LiveIntervalAssert.ll Added test case from PR1540. 2007-07-13 23:57:33 +00:00
2008-10-10-InlineAsmMemoryOperand.ll Add sparc test for memory operand used in inline asm 2008-10-10 10:15:33 +00:00
2008-10-10-InlineAsmRegOperand.ll Add testcase for 'r' inline asm operand 2008-10-10 20:28:59 +00:00
basictest.ll
ctpop.ll Remove llvm-upgrade and update tests. 2008-02-19 01:41:04 +00:00
dg.exp sabre brings to my attention that the 'tr' suffix is also obsolete 2008-05-20 21:00:03 +00:00
private.ll Add the private linkage. 2009-01-15 20:18:42 +00:00
xnor.ll Remove llvm-upgrade and update tests. 2008-02-19 01:41:04 +00:00