6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-17 18:31:04 +00:00
Code Issues Projects Releases Wiki Activity
1e7aa5c209
llvm-6502/lib/CodeGen/SelectionDAG
History
Chris Lattner 1e7aa5c209 commentate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31627 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 04:41:34 +00:00
..
DAGCombiner.cpp Don't attempt expensive pre-/post- indexed dag combine if target does not support them. 2006-11-09 19:10:46 +00:00
LegalizeDAG.cpp Fix PR988 and CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll. 2006-11-07 04:11:44 +00:00
Makefile
ScheduleDAG.cpp Changes to use operand constraints to process two-address instructions. 2006-11-04 09:44:31 +00:00
ScheduleDAGList.cpp Changes to use operand constraints to process two-address instructions. 2006-11-04 09:44:31 +00:00
ScheduleDAGRRList.cpp Remove dead code; added a missing null ptr check. 2006-11-06 21:33:46 +00:00
ScheduleDAGSimple.cpp For PR786: 2006-11-02 20:25:50 +00:00
SelectionDAG.cpp Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 2006-11-09 17:55:04 +00:00
SelectionDAGISel.cpp commentate 2006-11-10 04:41:34 +00:00
SelectionDAGPrinter.cpp Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 2006-11-09 18:44:21 +00:00
TargetLowering.cpp Add a mechanism to specify whether a target supports a particular indexed load / store. 2006-11-09 18:56:43 +00:00