llvm-6502/lib
Bob Wilson 1e9ccd68d4 ARM vector any_extends need to be selected to vmovl. <rdar://problem/10723651>
We have patterns for vector sext and zext operations but were missing
anyext.  Without those patterns, codegen will fail when the selection DAG
has any_extend nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148568 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20 20:59:56 +00:00
..
Analysis
Archive
AsmParser Extend Attributes to 64 bits 2012-01-20 17:56:17 +00:00
Bitcode Extend Attributes to 64 bits 2012-01-20 17:56:17 +00:00
CodeGen Extend Attributes to 64 bits 2012-01-20 17:56:17 +00:00
DebugInfo
ExecutionEngine
Linker
MC Add missing breaks to switch. 2012-01-20 14:42:37 +00:00
Object
Support
TableGen TblGen diagnostic for mismatched template instantiation. 2012-01-20 20:02:39 +00:00
Target ARM vector any_extends need to be selected to vmovl. <rdar://problem/10723651> 2012-01-20 20:59:56 +00:00
Transforms Extend Attributes to 64 bits 2012-01-20 17:56:17 +00:00
VMCore Extend Attributes to 64 bits 2012-01-20 17:56:17 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile