mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
82 lines
2.7 KiB
LLVM
82 lines
2.7 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
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%0 = type { i64, i64 }
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%1 = type { i128, i1 }
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define %0 @x(i64 %a.coerce0, i64 %a.coerce1, i64 %b.coerce0, i64 %b.coerce1) nounwind uwtable ssp {
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; CHECK: x
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entry:
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%tmp16 = zext i64 %a.coerce0 to i128
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%tmp11 = zext i64 %a.coerce1 to i128
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%tmp12 = shl nuw i128 %tmp11, 64
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%ins14 = or i128 %tmp12, %tmp16
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%tmp6 = zext i64 %b.coerce0 to i128
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%tmp3 = zext i64 %b.coerce1 to i128
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%tmp4 = shl nuw i128 %tmp3, 64
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%ins = or i128 %tmp4, %tmp6
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%0 = tail call %1 @llvm.smul.with.overflow.i128(i128 %ins14, i128 %ins)
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; CHECK: callq ___muloti4
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%1 = extractvalue %1 %0, 0
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%2 = extractvalue %1 %0, 1
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br i1 %2, label %overflow, label %nooverflow
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overflow: ; preds = %entry
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tail call void @llvm.trap()
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unreachable
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nooverflow: ; preds = %entry
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%tmp20 = trunc i128 %1 to i64
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%tmp21 = insertvalue %0 undef, i64 %tmp20, 0
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%tmp22 = lshr i128 %1, 64
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%tmp23 = trunc i128 %tmp22 to i64
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%tmp24 = insertvalue %0 %tmp21, i64 %tmp23, 1
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ret %0 %tmp24
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}
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define %0 @foo(i64 %a.coerce0, i64 %a.coerce1, i64 %b.coerce0, i64 %b.coerce1) nounwind uwtable ssp {
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entry:
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; CHECK: foo
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%retval = alloca i128, align 16
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%coerce = alloca i128, align 16
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%a.addr = alloca i128, align 16
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%coerce1 = alloca i128, align 16
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%b.addr = alloca i128, align 16
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%0 = bitcast i128* %coerce to %0*
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%1 = getelementptr %0, %0* %0, i32 0, i32 0
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store i64 %a.coerce0, i64* %1
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%2 = getelementptr %0, %0* %0, i32 0, i32 1
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store i64 %a.coerce1, i64* %2
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%a = load i128, i128* %coerce, align 16
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store i128 %a, i128* %a.addr, align 16
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%3 = bitcast i128* %coerce1 to %0*
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%4 = getelementptr %0, %0* %3, i32 0, i32 0
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store i64 %b.coerce0, i64* %4
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%5 = getelementptr %0, %0* %3, i32 0, i32 1
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store i64 %b.coerce1, i64* %5
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%b = load i128, i128* %coerce1, align 16
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store i128 %b, i128* %b.addr, align 16
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%tmp = load i128, i128* %a.addr, align 16
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%tmp2 = load i128, i128* %b.addr, align 16
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%6 = call %1 @llvm.umul.with.overflow.i128(i128 %tmp, i128 %tmp2)
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; CHECK: cmov
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; CHECK: divti3
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%7 = extractvalue %1 %6, 0
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%8 = extractvalue %1 %6, 1
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br i1 %8, label %overflow, label %nooverflow
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overflow: ; preds = %entry
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call void @llvm.trap()
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unreachable
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nooverflow: ; preds = %entry
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store i128 %7, i128* %retval
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%9 = bitcast i128* %retval to %0*
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%10 = load %0, %0* %9, align 1
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ret %0 %10
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}
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declare %1 @llvm.umul.with.overflow.i128(i128, i128) nounwind readnone
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declare %1 @llvm.smul.with.overflow.i128(i128, i128) nounwind readnone
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declare void @llvm.trap() nounwind
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