Tom Stellard 1eaeee8654 Merging r226970: ...

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r226970 | thomas.stellard | 2015-01-23 18:59:08 -0500 (Fri, 23 Jan 2015) | 2 lines

R600/SI: Emit .hsa.version section for amdhsa OS

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@227365 91177308-0d34-0410-b5e6-96231b3b80d8

2015-01-28 20:46:16 +00:00

..

AsmParser

R600/SI: Add a stub GCNTargetMachine

2015-01-06 18:00:21 +00:00

InstPrinter

[cleanup] Re-sort all the #include lines in LLVM using

2015-01-14 11:23:27 +00:00

MCTargetDesc

Port r226022 to the 3.6 branch.

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TargetInfo

R600/SI: Add a stub GCNTargetMachine

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AMDGPU.h

Merging r226586:

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AMDGPU.td

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AMDGPUAlwaysInlinePass.cpp

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AMDGPUAsmPrinter.cpp

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AMDGPUAsmPrinter.h

R600/SI: Emit amd_kernel_code_t header for AMDGPU environment

2014-12-02 22:00:07 +00:00

AMDGPUCallingConv.td

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AMDGPUFrameLowering.cpp

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AMDGPUFrameLowering.h

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AMDGPUInstrInfo.cpp

Merging r226188:

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AMDGPUInstrInfo.h

Merging r226188:

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AMDGPUInstrInfo.td

R600/SI: Add class intrinsic

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AMDGPUInstructions.td

R600/SI: Make more unordered comparisons legal

2014-12-11 22:15:39 +00:00

AMDGPUIntrinsicInfo.cpp

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AMDGPUIntrinsicInfo.h

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AMDGPUIntrinsics.td

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AMDGPUISelDAGToDAG.cpp

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AMDGPUISelLowering.cpp

Merging r226945:

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AMDGPUISelLowering.h

R600: Implement getRecipEstimate

2015-01-13 20:53:23 +00:00

AMDGPUMachineFunction.cpp

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AMDGPUMachineFunction.h

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AMDGPUMCInstLower.cpp

Merging r226586:

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AMDGPUMCInstLower.h

Merging r226188:

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AMDGPUPromoteAlloca.cpp

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AMDGPURegisterInfo.cpp

R600/SI: Enable inline assembly

2014-12-03 04:08:00 +00:00

AMDGPURegisterInfo.h

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AMDGPURegisterInfo.td

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AMDGPUSubtarget.cpp

Merging r226597:

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AMDGPUSubtarget.h

Merging r226597:

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AMDGPUTargetMachine.cpp

R600/SI: Spill VGPRs to scratch space for compute shaders

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AMDGPUTargetMachine.h

R600/SI: Add a stub GCNTargetMachine

2015-01-06 18:00:21 +00:00

AMDGPUTargetTransformInfo.cpp

Fix broken doxygen annotations, NFC

2014-11-12 18:25:06 +00:00

AMDILCFGStructurizer.cpp

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AMDKernelCodeT.h

R600/SI: Emit amd_kernel_code_t header for AMDGPU environment

2014-12-02 22:00:07 +00:00

CaymanInstructions.td

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CIInstructions.td

R600/SI: Add VI instructions

2014-12-07 12:18:57 +00:00

CMakeLists.txt

R600/SI: Spill VGPRs to scratch space for compute shaders

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EvergreenInstructions.td

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LLVMBuild.txt

R600/SI: Start implementing an assembler

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Makefile

R600/SI: Start implementing an assembler

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Processors.td

R600/SI: Define a schedule model

2015-01-14 01:13:19 +00:00

R600ClauseMergePass.cpp

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R600ControlFlowFinalizer.cpp

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R600Defines.h

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R600EmitClauseMarkers.cpp

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R600ExpandSpecialInstrs.cpp

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R600InstrFormats.td

R600/SI: Start implementing an assembler

2014-11-14 14:08:00 +00:00

R600InstrInfo.cpp

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R600InstrInfo.h

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R600Instructions.td

R600/SI: Use unordered not equal instructions

2014-12-11 22:15:35 +00:00

R600Intrinsics.td

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R600ISelLowering.cpp

[SelectionDAG] Allow targets to specify legality of extloads' result

2015-01-08 00:51:32 +00:00

R600ISelLowering.h

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R600MachineFunctionInfo.cpp

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R600MachineFunctionInfo.h

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R600MachineScheduler.cpp

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R600MachineScheduler.h

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R600OptimizeVectorRegisters.cpp

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R600Packetizer.cpp

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R600RegisterInfo.cpp

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R600RegisterInfo.h

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R600RegisterInfo.td

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R600Schedule.td

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R600TextureIntrinsicsReplacer.cpp

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R700Instructions.td

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SIAnnotateControlFlow.cpp

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SIDefines.h

Merging r226597:

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SIFixSGPRCopies.cpp

R600/SI: Remove VReg_32 register class

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SIFixSGPRLiveRanges.cpp

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SIFoldOperands.cpp

R600/SI: Add pattern for bitcasting fp immediates to integers

2015-01-13 22:59:41 +00:00

SIInsertWaits.cpp

R600/SI: Insert s_waitcnt before s_barrier instructions.

2015-01-06 19:52:07 +00:00

SIInstrFormats.td

Merging r226187:

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SIInstrInfo.cpp

Merging r226597:

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SIInstrInfo.h

Merging r226188:

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SIInstrInfo.td

Merging r226226:

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SIInstructions.td

Merging r226586:

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SIIntrinsics.td

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SIISelLowering.cpp

Merging r226597:

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SIISelLowering.h

R600/SI: Fix bad code with unaligned byte vector loads

2015-01-14 01:35:22 +00:00

SILoadStoreOptimizer.cpp

R600/SI: Fix live range error hidden by SIFoldOperands

2014-12-03 05:22:29 +00:00

SILowerControlFlow.cpp

R600/SI: Add pattern for bitcasting fp immediates to integers

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SILowerI1Copies.cpp

R600/SI: Remove VReg_32 register class

2015-01-07 20:59:25 +00:00

SIMachineFunctionInfo.cpp

R600/SI: Spill VGPRs to scratch space for compute shaders

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SIMachineFunctionInfo.h

Merging r226597:

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SIPrepareScratchRegs.cpp

Merging r226596:

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SIRegisterInfo.cpp

Merging r226597:

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SIRegisterInfo.h

Merging r226586:

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SIRegisterInfo.td

R600/SI: Use RegisterOperands to specify which operands can accept immediates

2015-01-12 19:33:18 +00:00

SISchedule.td

R600/SI: Define a schedule model

2015-01-14 01:13:19 +00:00

SIShrinkInstructions.cpp

Merging r226188:

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SITypeRewriter.cpp

Revert "IR: MDNode => Value"

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VIInstrFormats.td

R600/SI: Add VI instructions

2014-12-07 12:18:57 +00:00

VIInstructions.td

Merging r226191:

2015-01-21 22:44:42 +00:00