Chad Rosier 1eb67a4f84 [AArch64] Add SchedRW lists to NEON instructions. ... Previously, only regular AArch64 instructions were annotated with SchedRW lists. This patch does the same for NEON enabling these instructions to be scheduled by the MIScheduler. Additionally, store operations are now modeled and a few SchedRW lists were updated for bug fixes (e.g. multiple def operands). Reviewers: apazos, mcrosier, atrick Patch by Dave Estes <cestes@codeaurora.org>! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204505 91177308-0d34-0410-b5e6-96231b3b80d8		2014-03-21 19:34:41 +00:00
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AArch64	[AArch64] Add SchedRW lists to NEON instructions.	2014-03-21 19:34:41 +00:00
ARM	Fix test command line to avoid generating output file.	2014-03-21 07:20:29 +00:00
CPP
Generic
Hexagon
Inputs
Mips	[mips] Correct lowering of VECTOR_SHUFFLE to VSHF.	2014-03-21 16:56:51 +00:00
MSP430
NVPTX
PowerPC	Remove redundant test.	2014-03-21 18:00:51 +00:00
R600	R600/SI: Move instruction patterns to scalar versions.	2014-03-21 18:01:18 +00:00
SPARC
SystemZ	[SystemZ] Add support for z196 float<->unsigned conversions	2014-03-21 10:56:30 +00:00
Thumb
Thumb2
X86	Move codegen test over to MC.	2014-03-21 17:55:34 +00:00
XCore