mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-07 16:54:48 +00:00
9ff542f2cc
2. Added argument to instruction scheduler creators so the creators can do special things. 3. Repaired target hazard code. 4. Misc. More to follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29450 91177308-0d34-0410-b5e6-96231b3b80d8
43 lines
1.4 KiB
C++
43 lines
1.4 KiB
C++
//===-- Passes.cpp - Target independent code generation passes ------------===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file was developed by the LLVM research group and is distributed under
|
|
// the University of Illinois Open Source License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file defines interfaces to access the target independent code
|
|
// generation passes provided by the LLVM backend.
|
|
//
|
|
//===---------------------------------------------------------------------===//
|
|
|
|
#include "llvm/CodeGen/MachinePassRegistry.h"
|
|
#include "llvm/CodeGen/Passes.h"
|
|
#include "llvm/Support/CommandLine.h"
|
|
#include <iostream>
|
|
|
|
using namespace llvm;
|
|
|
|
namespace {
|
|
cl::opt<const char *, false, RegisterPassParser<RegisterRegAlloc> >
|
|
RegAlloc("regalloc",
|
|
cl::init("linearscan"),
|
|
cl::desc("Register allocator to use: (default = linearscan)"));
|
|
}
|
|
|
|
FunctionPass *llvm::createRegisterAllocator() {
|
|
RegisterRegAlloc::FunctionPassCtor Ctor = RegisterRegAlloc::getDefault();
|
|
|
|
if (!Ctor) {
|
|
Ctor = RegisterRegAlloc::FindCtor(RegAlloc);
|
|
assert(Ctor && "No register allocator found");
|
|
if (!Ctor) Ctor = RegisterRegAlloc::FirstCtor();
|
|
RegisterRegAlloc::setDefault(Ctor);
|
|
}
|
|
|
|
assert(Ctor && "No register allocator found");
|
|
|
|
return Ctor();
|
|
}
|