llvm-6502/include/llvm/Target
Chris Lattner 5a09690446 Implement a signficant optimization for inline asm:
When choosing between constraints with multiple options,
like "ir", test to see if we can use the 'i' constraint and
go with that if possible.  This produces more optimal ASM in
all cases (sparing a register and an instruction to load it),
and fixes inline asm like this:

void test () {
  asm volatile (" %c0 %1 " : : "imr" (42), "imr"(14));
}

Previously we would dump "42" into a memory location (which
is ok for the 'm' constraint) which would cause a problem
because the 'c' modifier is not valid on memory operands.

Isn't it great how inline asm turns 'missed optimization'
into 'compile failed'??

Incidentally, this was the todo in 
PowerPC/2007-04-24-InlineAsm-I-Modifier.ll

Please do NOT pull this into Tak.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50315 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-27 00:37:18 +00:00
..
SubtargetFeature.h
TargetAsmInfo.h Fix a bug in Darwin EH: FDE->CIE pointer must 2008-03-26 23:31:39 +00:00
TargetData.h
TargetELFWriterInfo.h
TargetFrameInfo.h
TargetInstrDesc.h Fix some minor errors in comments. 2008-04-09 20:08:06 +00:00
TargetInstrInfo.h Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented 2008-04-16 20:10:13 +00:00
TargetInstrItineraries.h A quick nm audit turned up several fixed tables and objects that were 2008-03-25 21:45:14 +00:00
TargetJITInfo.h Correlate stubs with functions in JIT: when emitting a stub, the JIT tells the memory manager which function 2008-04-16 20:46:05 +00:00
TargetLowering.h Implement a signficant optimization for inline asm: 2008-04-27 00:37:18 +00:00
TargetMachine.h Add facility for pre-RA passes 2008-04-23 18:22:28 +00:00
TargetMachineRegistry.h
TargetMachOWriterInfo.h
TargetOptions.h Make stack alignment options global for all targets 2008-04-23 18:18:10 +00:00
TargetRegisterInfo.h Sort sub-registers and super-registers lists according to super-sub register relations. e.g. X86::RAX sub-register list is EAX, AX, AL, AH (order of last two are not guaranteed). 2008-04-15 07:56:03 +00:00
TargetSubtarget.h Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal 2008-04-12 04:36:06 +00:00