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https://github.com/c64scene-ar/llvm-6502.git
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461f1fc359
The theory is it's still faster than a pair of movq / a quad of movl. This will probably hurt older chips like P4 but should run faster on current and future Intel processors. rdar://8817010 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122955 91177308-0d34-0410-b5e6-96231b3b80d8
40 lines
1.3 KiB
LLVM
40 lines
1.3 KiB
LLVM
; RUN: llc < %s -mtriple x86_64-apple-darwin | FileCheck %s
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%struct.A = type { [48 x i8], i32, i32, i32 }
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@c = external thread_local global %struct.A, align 4
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define void @main() nounwind ssp {
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entry:
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call void @llvm.memset.p0i8.i64(i8* getelementptr inbounds (%struct.A* @c, i32 0, i32 0, i32 0), i8 0, i64 60, i32 1, i1 false)
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unreachable
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; CHECK: movq _c@TLVP(%rip), %rdi
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; CHECK-NEXT: callq *(%rdi)
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; CHECK-NEXT: pxor %xmm0, %xmm0
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; CHECK-NEXT: movups %xmm0, 32(%rax)
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; CHECK-NEXT: movups %xmm0, 16(%rax)
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; CHECK-NEXT: movups %xmm0, (%rax)
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; CHECK-NEXT: movl $0, 56(%rax)
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; CHECK-NEXT: movq $0, 48(%rax)
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}
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
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@a = thread_local global i32 0 ; <i32*> [#uses=0]
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@b = thread_local global i32 0 ; <i32*> [#uses=0]
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; CHECK: .tbss _a$tlv$init, 4, 2
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; CHECK: .section __DATA,__thread_vars,thread_local_variables
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; CHECK: .globl _a
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; CHECK: _a:
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; CHECK: .quad __tlv_bootstrap
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; CHECK: .quad 0
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; CHECK: .quad _a$tlv$init
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; CHECK: .tbss _b$tlv$init, 4, 2
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; CHECK: .globl _b
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; CHECK: _b:
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; CHECK: .quad __tlv_bootstrap
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; CHECK: .quad 0
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; CHECK: .quad _b$tlv$init
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