Daniel Sanders 1f4c755c2c [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6 ... Summary: Also tightened up the acceptable condition operand for these instructions on MIPS-I to MIPS-III. Support for $fcc[1-7] was added in MIPS-IV. Prior to that only $fcc0 is acceptable. We currently don't optimize (BEQZ (NOT $a), $target) and similar. It's probably best to do this in InstCombine. Depends on D4111 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D4112 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210787 91177308-0d34-0410-b5e6-96231b3b80d8		2014-06-12 15:00:17 +00:00
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invalid-mips64r2.s	[mips] Fold FeatureSwap into FeatureMips32r2 and FeatureMips64r2	2014-05-12 12:15:41 +00:00
invalid.s	[mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier).	2014-06-11 15:05:56 +00:00
valid-xfail.s	[mips] Correct tests that are meant to test valid assembly. They were actually rejected by GAS.	2014-05-08 15:17:29 +00:00
valid.s	[mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6	2014-06-12 15:00:17 +00:00