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https://github.com/c64scene-ar/llvm-6502.git
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9f7818d9bd
Remove Cxxx registers, add new special register - "ALU_CONST" and new operand for each alu src - "sel". ALU_CONST is used to designate that the new operand contains the value to override src.sel, src.kc_bank, src.chan for constants in the driver. Patch by: Vadim Girlin Vincent Lejeune: - Use pointers for constants - Fold CONST_ADDRESS when possible Tom Stellard: - Give CONSTANT_BUFFER_0 its own address space - Use integer types for constant loads Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173222 91177308-0d34-0410-b5e6-96231b3b80d8
75 lines
2.4 KiB
C++
75 lines
2.4 KiB
C++
//===-- R600LowerConstCopy.cpp - Propagate ConstCopy / lower them to MOV---===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// This pass is intended to handle remaining ConstCopy pseudo MachineInstr.
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/// ISel will fold each Const Buffer read inside scalar ALU. However it cannot
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/// fold them inside vector instruction, like DOT4 or Cube ; ISel emits
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/// ConstCopy instead. This pass (executed after ExpandingSpecialInstr) will try
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/// to fold them if possible or replace them by MOV otherwise.
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/// TODO : Implement the folding part, using Copy Propagation algorithm.
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPU.h"
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#include "R600InstrInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/IR/GlobalValue.h"
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namespace llvm {
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class R600LowerConstCopy : public MachineFunctionPass {
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private:
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static char ID;
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const R600InstrInfo *TII;
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public:
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R600LowerConstCopy(TargetMachine &tm);
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virtual bool runOnMachineFunction(MachineFunction &MF);
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const char *getPassName() const { return "R600 Eliminate Symbolic Operand"; }
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};
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char R600LowerConstCopy::ID = 0;
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R600LowerConstCopy::R600LowerConstCopy(TargetMachine &tm) :
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MachineFunctionPass(ID),
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TII (static_cast<const R600InstrInfo *>(tm.getInstrInfo()))
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{
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}
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bool R600LowerConstCopy::runOnMachineFunction(MachineFunction &MF) {
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for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
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BB != BB_E; ++BB) {
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MachineBasicBlock &MBB = *BB;
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for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
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I != E;) {
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MachineInstr &MI = *I;
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I = llvm::next(I);
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if (MI.getOpcode() != AMDGPU::CONST_COPY)
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continue;
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MachineInstr *NewMI = TII->buildDefaultInstruction(MBB, I, AMDGPU::MOV,
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MI.getOperand(0).getReg(), AMDGPU::ALU_CONST);
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NewMI->getOperand(9).setImm(MI.getOperand(1).getImm());
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MI.eraseFromParent();
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}
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}
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return false;
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}
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FunctionPass *createR600LowerConstCopy(TargetMachine &tm) {
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return new R600LowerConstCopy(tm);
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}
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}
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