llvm-6502/test/MC/ARM/eh-link.s
Rafael Espindola b4b0b34181 Write relocation sections contiguously.
Linkers normally read all the relocations upfront to compute the references
between sections. Putting them together is a bit more cache friendly.

I benchmarked linking a Release+Asserts clang with gold on a vm. I tried all
4 combinations of --gc-sections/no --gc-section hot and cold cache.

I cleared the cache with

echo 3 > /proc/sys/vm/drop_caches

and warmed it up by running the link once before timing the subsequent ones.

With cold cache and --gc-sections the time goes from

1.86130781665 +- 0.01713126697463843 seconds
to
1.82370735105 +- 0.014127522318814516 seconds

With cold cache and no --gc-sections the time goes from

1.6087245435500002 +- 0.012999066825178644 seconds
to
1.5687122041500001 +- 0.013145850126026619 seconds

With hot cache and no --gc-sections the time goes from

0.926200939 ( +-  0.33% ) seconds
to
0.907200079 ( +-  0.31% ) seconds

With hot cache and gc sections the time goes from

1.183038049 ( +-  0.34% ) seconds
to
1.147355862 ( +-  0.39% ) seconds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235165 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 08:11:38 +00:00

91 lines
2.2 KiB
ArmAsm

@ RUN: llvm-mc %s -triple=armv7-unknown-linux-gnueabi -filetype=obj -o - \
@ RUN: | llvm-readobj -s | FileCheck %s
@ Test that the ARM_EXIDX sections point (Link) to the corresponding text
@ sections.
@ FIXME: The section numbers are not important. If llvm-readobj printed the
@ name first we could use a FileCheck variable.
@ CHECK: Section {
@ CHECK: Index: 6
@ CHECK-NEXT: Name: .text
@ CHECK-NEXT: Type: SHT_PROGBITS
@ CHECK-NEXT: Flags [
@ CHECK-NEXT: SHF_ALLOC
@ CHECK-NEXT: SHF_EXECINSTR
@ CHECK-NEXT: SHF_GROUP
@ CHECK-NEXT: ]
@ CHECK-NEXT: Address: 0x0
@ CHECK-NEXT: Offset: 0x54
@ CHECK-NEXT: Size: 4
@ CHECK-NEXT: Link: 0
@ CHECK-NEXT: Info: 0
@ CHECK-NEXT: AddressAlignment: 1
@ CHECK-NEXT: EntrySize: 0
@ CHECK-NEXT: }
@ CHECK-NEXT: Section {
@ CHECK-NEXT: Index: 7
@ CHECK-NEXT: Name: .ARM.exidx
@ CHECK-NEXT: Type: SHT_ARM_EXIDX
@ CHECK-NEXT: Flags [
@ CHECK-NEXT: SHF_ALLOC
@ CHECK-NEXT: SHF_GROUP
@ CHECK-NEXT: SHF_LINK_ORDER
@ CHECK-NEXT: ]
@ CHECK-NEXT: Address: 0x0
@ CHECK-NEXT: Offset: 0x58
@ CHECK-NEXT: Size: 8
@ CHECK-NEXT: Link: 6
@ CHECK-NEXT: Info: 0
@ CHECK-NEXT: AddressAlignment: 4
@ CHECK-NEXT: EntrySize: 0
@ CHECK-NEXT: }
@ CHECK: Section {
@ CHECK: Index: 8
@ CHECK-NEXT: Name: .text
@ CHECK-NEXT: Type: SHT_PROGBITS
@ CHECK-NEXT: Flags [
@ CHECK-NEXT: SHF_ALLOC
@ CHECK-NEXT: SHF_EXECINSTR
@ CHECK-NEXT: SHF_GROUP
@ CHECK-NEXT: ]
@ CHECK-NEXT: Address: 0x0
@ CHECK-NEXT: Offset:
@ CHECK-NEXT: Size: 4
@ CHECK-NEXT: Link: 0
@ CHECK-NEXT: Info: 0
@ CHECK-NEXT: AddressAlignment: 1
@ CHECK-NEXT: EntrySize: 0
@ CHECK-NEXT: }
@ CHECK-NEXT: Section {
@ CHECK-NEXT: Index: 9
@ CHECK-NEXT: Name: .ARM.exidx
@ CHECK-NEXT: Type: SHT_ARM_EXIDX
@ CHECK-NEXT: Flags [
@ CHECK-NEXT: SHF_ALLOC
@ CHECK-NEXT: SHF_GROUP
@ CHECK-NEXT: SHF_LINK_ORDER
@ CHECK-NEXT: ]
@ CHECK-NEXT: Address: 0x0
@ CHECK-NEXT: Offset:
@ CHECK-NEXT: Size: 8
@ CHECK-NEXT: Link: 8
@ CHECK-NEXT: Info: 0
@ CHECK-NEXT: AddressAlignment: 4
@ CHECK-NEXT: EntrySize: 0
@ CHECK-NEXT: }
.section .text,"axG",%progbits,f,comdat
f:
.fnstart
mov pc, lr
.fnend
.section .text,"axG",%progbits,g,comdat
g:
.fnstart
mov pc, lr
.fnend