6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-14 11:32:34 +00:00
Code Issues Projects Releases Wiki Activity
1faf9be569
llvm-6502/test/CodeGen
History
Michael Liao dd3383fd09 Fix PR14314 
- Fix operand order for atomic sub, where the minuend is the value
  loaded from memory and the subtrahend is the parameter specified.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167718 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-12 06:49:17 +00:00
..
ARM Disable the Thumb no-return call optimization: 2012-11-10 02:09:05 +00:00
CellSPU Fix broken tests. 2012-10-02 15:49:34 +00:00
CPP
Generic
Hexagon
MBlaze
Mips [mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node. 2012-11-07 19:10:58 +00:00
MSP430 Fix fallout from RegInfo => FrameLowering refactoring on MSP430. 2012-10-17 17:37:11 +00:00
NVPTX [NVPTX] Add more precise PTX/SM target attributes 2012-11-12 03:16:43 +00:00
PowerPC Fix assertions in updateRegMaskSlots(). 2012-11-09 19:18:49 +00:00
SPARC Use TargetTransformInfo to control switch-to-lookup table transformation 2012-10-30 11:23:25 +00:00
Thumb Convert an improper CodeGen test to a MC test. 2012-11-10 04:30:40 +00:00
Thumb2 Add GPRPair Register class to ARM. 2012-10-26 21:29:15 +00:00
X86 Fix PR14314 2012-11-12 06:49:17 +00:00
XCore