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3b25529336
The BLR pattern cannot be recognized by the asm parser in its current form. This complexity is due to an apparent attempt to enable conditional BLR variants. However, none of those can ever be generated by current code; the pattern is only ever created using the default "pred" operand. To simplify the pattern and allow it to be recognized by the parser, this commit removes those attempts at conditional BLR support. When we later come back to actually add real conditional BLR, this should probably be done via a fully generic conditional branch pattern. No change in generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178002 91177308-0d34-0410-b5e6-96231b3b80d8
44 lines
1.3 KiB
C++
44 lines
1.3 KiB
C++
//===-- PPCPredicates.h - PPC Branch Predicate Information ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes the PowerPC branch predicates.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_POWERPC_PPCPREDICATES_H
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#define LLVM_TARGET_POWERPC_PPCPREDICATES_H
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// GCC #defines PPC on Linux but we use it as our namespace name
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#undef PPC
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// Generated files will use "namespace PPC". To avoid symbol clash,
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// undefine PPC here. PPC may be predefined on some hosts.
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#undef PPC
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namespace llvm {
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namespace PPC {
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/// Predicate - These are "(BI << 5) | BO" for various predicates.
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enum Predicate {
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PRED_LT = (0 << 5) | 12,
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PRED_LE = (1 << 5) | 4,
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PRED_EQ = (2 << 5) | 12,
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PRED_GE = (0 << 5) | 4,
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PRED_GT = (1 << 5) | 12,
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PRED_NE = (2 << 5) | 4,
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PRED_UN = (3 << 5) | 12,
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PRED_NU = (3 << 5) | 4
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};
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/// Invert the specified predicate. != -> ==, < -> >=.
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Predicate InvertPredicate(Predicate Opcode);
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}
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}
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#endif
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