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https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201115 91177308-0d34-0410-b5e6-96231b3b80d8
204 lines
6.6 KiB
C++
204 lines
6.6 KiB
C++
//===------------------- StackMaps.h - StackMaps ----------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_STACKMAPS
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#define LLVM_STACKMAPS
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#include "llvm/ADT/MapVector.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include <map>
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#include <vector>
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namespace llvm {
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class AsmPrinter;
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class MCExpr;
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/// \brief MI-level patchpoint operands.
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///
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/// MI patchpoint operations take the form:
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/// [<def>], <id>, <numBytes>, <target>, <numArgs>, <cc>, ...
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///
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/// IR patchpoint intrinsics do not have the <cc> operand because calling
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/// convention is part of the subclass data.
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///
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/// SD patchpoint nodes do not have a def operand because it is part of the
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/// SDValue.
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///
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/// Patchpoints following the anyregcc convention are handled specially. For
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/// these, the stack map also records the location of the return value and
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/// arguments.
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class PatchPointOpers {
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public:
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/// Enumerate the meta operands.
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enum { IDPos, NBytesPos, TargetPos, NArgPos, CCPos, MetaEnd };
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private:
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const MachineInstr *MI;
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bool HasDef;
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bool IsAnyReg;
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public:
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explicit PatchPointOpers(const MachineInstr *MI);
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bool isAnyReg() const { return IsAnyReg; }
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bool hasDef() const { return HasDef; }
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unsigned getMetaIdx(unsigned Pos = 0) const {
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assert(Pos < MetaEnd && "Meta operand index out of range.");
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return (HasDef ? 1 : 0) + Pos;
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}
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const MachineOperand &getMetaOper(unsigned Pos) {
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return MI->getOperand(getMetaIdx(Pos));
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}
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unsigned getArgIdx() const { return getMetaIdx() + MetaEnd; }
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/// Get the operand index of the variable list of non-argument operands.
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/// These hold the "live state".
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unsigned getVarIdx() const {
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return getMetaIdx() + MetaEnd
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+ MI->getOperand(getMetaIdx(NArgPos)).getImm();
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}
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/// Get the index at which stack map locations will be recorded.
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/// Arguments are not recorded unless the anyregcc convention is used.
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unsigned getStackMapStartIdx() const {
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if (IsAnyReg)
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return getArgIdx();
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return getVarIdx();
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}
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/// \brief Get the next scratch register operand index.
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unsigned getNextScratchIdx(unsigned StartIdx = 0) const;
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};
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class StackMaps {
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public:
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struct Location {
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enum LocationType { Unprocessed, Register, Direct, Indirect, Constant,
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ConstantIndex };
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LocationType LocType;
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unsigned Size;
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unsigned Reg;
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int64_t Offset;
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Location() : LocType(Unprocessed), Size(0), Reg(0), Offset(0) {}
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Location(LocationType LocType, unsigned Size, unsigned Reg, int64_t Offset)
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: LocType(LocType), Size(Size), Reg(Reg), Offset(Offset) {}
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};
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struct LiveOutReg {
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unsigned short Reg;
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unsigned short RegNo;
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unsigned short Size;
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LiveOutReg() : Reg(0), RegNo(0), Size(0) {}
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LiveOutReg(unsigned short Reg, unsigned short RegNo, unsigned short Size)
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: Reg(Reg), RegNo(RegNo), Size(Size) {}
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void MarkInvalid() { Reg = 0; }
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// Only sort by the dwarf register number.
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bool operator< (const LiveOutReg &LO) const { return RegNo < LO.RegNo; }
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static bool IsInvalid(const LiveOutReg &LO) { return LO.Reg == 0; }
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};
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// OpTypes are used to encode information about the following logical
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// operand (which may consist of several MachineOperands) for the
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// OpParser.
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typedef enum { DirectMemRefOp, IndirectMemRefOp, ConstantOp } OpType;
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StackMaps(AsmPrinter &AP) : AP(AP) {}
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/// \brief Generate a stackmap record for a stackmap instruction.
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///
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/// MI must be a raw STACKMAP, not a PATCHPOINT.
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void recordStackMap(const MachineInstr &MI);
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/// \brief Generate a stackmap record for a patchpoint instruction.
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void recordPatchPoint(const MachineInstr &MI);
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/// If there is any stack map data, create a stack map section and serialize
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/// the map info into it. This clears the stack map data structures
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/// afterwards.
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void serializeToStackMapSection();
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private:
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typedef SmallVector<Location, 8> LocationVec;
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typedef SmallVector<LiveOutReg, 8> LiveOutVec;
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typedef MapVector<const MCSymbol *, uint32_t> FnStackSizeMap;
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struct CallsiteInfo {
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const MCExpr *CSOffsetExpr;
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uint64_t ID;
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LocationVec Locations;
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LiveOutVec LiveOuts;
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CallsiteInfo() : CSOffsetExpr(0), ID(0) {}
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CallsiteInfo(const MCExpr *CSOffsetExpr, uint64_t ID,
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LocationVec &Locations, LiveOutVec &LiveOuts)
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: CSOffsetExpr(CSOffsetExpr), ID(ID), Locations(Locations),
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LiveOuts(LiveOuts) {}
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};
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typedef std::vector<CallsiteInfo> CallsiteInfoList;
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struct ConstantPool {
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private:
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typedef std::map<int64_t, size_t> ConstantsMap;
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std::vector<int64_t> ConstantsList;
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ConstantsMap ConstantIndexes;
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public:
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size_t getNumConstants() const { return ConstantsList.size(); }
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int64_t getConstant(size_t Idx) const { return ConstantsList[Idx]; }
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size_t getConstantIndex(int64_t ConstVal) {
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size_t NextIdx = ConstantsList.size();
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ConstantsMap::const_iterator I =
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ConstantIndexes.insert(ConstantIndexes.end(),
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std::make_pair(ConstVal, NextIdx));
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if (I->second == NextIdx)
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ConstantsList.push_back(ConstVal);
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return I->second;
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}
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};
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AsmPrinter &AP;
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CallsiteInfoList CSInfos;
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ConstantPool ConstPool;
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FnStackSizeMap FnStackSize;
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MachineInstr::const_mop_iterator
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parseOperand(MachineInstr::const_mop_iterator MOI,
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MachineInstr::const_mop_iterator MOE,
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LocationVec &Locs, LiveOutVec &LiveOuts) const;
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/// \brief Create a live-out register record for the given register @p Reg.
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LiveOutReg createLiveOutReg(unsigned Reg,
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const TargetRegisterInfo *TRI) const;
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/// \brief Parse the register live-out mask and return a vector of live-out
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/// registers that need to be recorded in the stackmap.
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LiveOutVec parseRegisterLiveOutMask(const uint32_t *Mask) const;
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/// This should be called by the MC lowering code _immediately_ before
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/// lowering the MI to an MCInst. It records where the operands for the
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/// instruction are stored, and outputs a label to record the offset of
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/// the call from the start of the text section. In special cases (e.g. AnyReg
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/// calling convention) the return register is also recorded if requested.
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void recordStackMapOpers(const MachineInstr &MI, uint64_t ID,
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MachineInstr::const_mop_iterator MOI,
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MachineInstr::const_mop_iterator MOE,
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bool recordResult = false);
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};
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}
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#endif // LLVM_STACKMAPS
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