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201ab3acff
order to reduce ((x<<30)>>24) to x<<6, check the correct bits. PR 8547. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118665 91177308-0d34-0410-b5e6-96231b3b80d8
26 lines
895 B
LLVM
26 lines
895 B
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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; Converting the 2 shifts to SHL 6 without the AND is wrong. PR 8547.
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@g_2 = global i32 0, align 4
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@.str = constant [10 x i8] c"g_2 = %d\0A\00"
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declare i32 @printf(i8*, ...)
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define i32 @main() nounwind {
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codeRepl:
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br label %for.cond
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for.cond: ; preds = %for.cond, %codeRepl
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%storemerge = phi i32 [ 0, %codeRepl ], [ 5, %for.cond ]
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store i32 %storemerge, i32* @g_2, align 4
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%shl = shl i32 %storemerge, 30
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%conv2 = lshr i32 %shl, 24
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; CHECK: %0 = shl i32 %storemerge, 6
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; CHECK: %conv2 = and i32 %0, 64
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%tobool = icmp eq i32 %conv2, 0
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br i1 %tobool, label %for.cond, label %codeRepl2
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codeRepl2: ; preds = %for.cond
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%call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([10 x i8]* @.str, i64 0, i64 0), i32 %conv2) nounwind
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ret i32 0
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} |