Jozef Kolek 2032d755e7 [mips][microMIPS] Make usage of ADDU16 and SUBU16 by code generator ... Differential Revision: http://reviews.llvm.org/D7609 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229706 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-18 17:33:56 +00:00
..
AArch64	AArch64: Safely handle the incoming sret call argument.	2015-02-16 18:10:47 +00:00
ARM	[ARM] Add missing M/R class CPUs	2015-02-18 10:33:30 +00:00
BPF
CPP
Generic	overloaded-intrinsic-name: exercise anyptr on struct	2015-01-27 20:03:08 +00:00
Hexagon	[Hexagon] Factoring classes out of store patterns.	2015-02-09 20:33:46 +00:00
Inputs
Mips	[mips][microMIPS] Make usage of ADDU16 and SUBU16 by code generator	2015-02-18 17:33:56 +00:00
MSP430
NVPTX	[NVPTX] Emit .pragma "nounroll" for loops marked with nounroll	2015-02-01 02:27:45 +00:00
PowerPC	This patch adds the VSX logical instructions introduced in the Power ISA 2.07. It also removes the added complexity that favors VMX versions of the three instructions.	2015-02-18 16:21:46 +00:00
R600	R600/SI: Add missing offset operand to buffer bothen	2015-02-18 02:04:38 +00:00
SPARC	SelectionDAG: fold (fp_to_u/sint (s/uint_to_fp)) here too	2015-02-16 21:47:58 +00:00
SystemZ	[SystemZ] Support all TLS access models - CodeGen part	2015-02-18 09:13:27 +00:00
Thumb
Thumb2	Make buildbots better.	2015-02-11 12:24:09 +00:00
X86	Fixes two issue in SimplifyDemandedBits of sext_in_reg:	2015-02-18 09:43:40 +00:00
XCore