Chris Lattner 20a35c3fa5 Teach the codegen to turn [aez]ext (setcc) -> selectcc of 1/0, which often ... allows other simplifications. For example, this compiles: int isnegative(unsigned int X) { return !(X < 2147483648U); } Into this code: x86: movl 4(%esp), %eax shrl $31, %eax ret arm: mov r0, r0, lsr #31 bx lr thumb: lsr r0, r0, #31 bx lr instead of: x86: cmpl $0, 4(%esp) sets %al movzbl %al, %eax ret arm: mov r3, #0 cmp r0, #0 movlt r3, #1 mov r0, r3 bx lr thumb: mov r2, #1 mov r1, #0 cmp r0, #0 blt LBB1_2 @entry LBB1_1: @entry cpy r2, r1 LBB1_2: @entry cpy r0, r2 bx lr Testcase here: test/CodeGen/Generic/ispositive.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35883 91177308-0d34-0410-b5e6-96231b3b80d8		2007-04-11 05:32:27 +00:00
..
CallingConvLower.cpp	add methods for analysis of call results and return nodes.	2007-02-28 07:09:40 +00:00
DAGCombiner.cpp	Teach the codegen to turn [aez]ext (setcc) -> selectcc of 1/0, which often	2007-04-11 05:32:27 +00:00
LegalizeDAG.cpp	1. Insert custom lowering hooks for ISD::ROTR and ISD::ROTL.	2007-04-02 21:36:32 +00:00
Makefile
ScheduleDAG.cpp	Fix some VC++ warnings.	2007-03-20 20:43:18 +00:00
ScheduleDAGList.cpp
ScheduleDAGRRList.cpp	Estimate a cost using the possible number of scratch registers required and use	2007-03-14 22:43:40 +00:00
ScheduleDAGSimple.cpp	switch the VRBaseMap in the scheduler from an std::map to a DenseMap. This	2007-02-04 08:47:20 +00:00
SelectionDAG.cpp	add some assertions	2007-04-09 05:23:13 +00:00
SelectionDAGISel.cpp	For PR1146:	2007-04-11 02:44:20 +00:00
SelectionDAGPrinter.cpp
TargetLowering.cpp	remove dead target hooks.	2007-04-09 23:34:08 +00:00