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ilist of MachineInstr objects. This allows constant time removal and insertion of MachineInstr instances from anywhere in each MachineBasicBlock. It also allows for constant time splicing of MachineInstrs into or out of MachineBasicBlocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11340 91177308-0d34-0410-b5e6-96231b3b80d8
271 lines
11 KiB
C++
271 lines
11 KiB
C++
//===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass eliminates machine instruction PHI nodes by inserting copy
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// instructions. This destroys SSA information, but is the desired input for
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// some register allocators.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/SSARegMap.h"
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#include "llvm/CodeGen/LiveVariables.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/CFG.h"
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namespace llvm {
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namespace {
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struct PNE : public MachineFunctionPass {
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bool runOnMachineFunction(MachineFunction &Fn) {
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bool Changed = false;
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// Eliminate PHI instructions by inserting copies into predecessor blocks.
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//
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for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
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Changed |= EliminatePHINodes(Fn, *I);
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//std::cerr << "AFTER PHI NODE ELIM:\n";
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//Fn.dump();
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return Changed;
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addPreserved<LiveVariables>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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private:
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/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions
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/// in predecessor basic blocks.
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///
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bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB);
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};
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RegisterPass<PNE> X("phi-node-elimination",
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"Eliminate PHI nodes for register allocation");
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}
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const PassInfo *PHIEliminationID = X.getPassInfo();
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/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
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/// predecessor basic blocks.
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///
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bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
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if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI)
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return false; // Quick exit for normal case...
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LiveVariables *LV = getAnalysisToUpdate<LiveVariables>();
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const TargetInstrInfo &MII = MF.getTarget().getInstrInfo();
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const MRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
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while (MBB.front().getOpcode() == TargetInstrInfo::PHI) {
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// Unlink the PHI node from the basic block... but don't delete the PHI yet
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MachineBasicBlock::iterator begin = MBB.begin();
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MachineInstr *MI = MBB.remove(begin);
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assert(MRegisterInfo::isVirtualRegister(MI->getOperand(0).getReg()) &&
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"PHI node doesn't write virt reg?");
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unsigned DestReg = MI->getOperand(0).getAllocatedRegNum();
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// Create a new register for the incoming PHI arguments
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const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(DestReg);
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unsigned IncomingReg = MF.getSSARegMap()->createVirtualRegister(RC);
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// Insert a register to register copy in the top of the current block (but
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// after any remaining phi nodes) which copies the new incoming register
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// into the phi node destination.
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//
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MachineBasicBlock::iterator AfterPHIsIt = MBB.begin();
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while (AfterPHIsIt != MBB.end() &&
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AfterPHIsIt->getOpcode() == TargetInstrInfo::PHI)
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++AfterPHIsIt; // Skip over all of the PHI nodes...
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RegInfo->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC);
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// Update live variable information if there is any...
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if (LV) {
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MachineInstr *PHICopy = --AfterPHIsIt;
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// Add information to LiveVariables to know that the incoming value is
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// killed. Note that because the value is defined in several places (once
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// each for each incoming block), the "def" block and instruction fields
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// for the VarInfo is not filled in.
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//
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LV->addVirtualRegisterKilled(IncomingReg, &MBB, PHICopy);
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// Since we are going to be deleting the PHI node, if it is the last use
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// of any registers, or if the value itself is dead, we need to move this
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// information over to the new copy we just inserted...
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//
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std::pair<LiveVariables::killed_iterator, LiveVariables::killed_iterator>
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RKs = LV->killed_range(MI);
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std::vector<std::pair<MachineInstr*, unsigned> > Range;
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if (RKs.first != RKs.second) {
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// Copy the range into a vector...
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Range.assign(RKs.first, RKs.second);
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// Delete the range...
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LV->removeVirtualRegistersKilled(RKs.first, RKs.second);
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// Add all of the kills back, which will update the appropriate info...
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for (unsigned i = 0, e = Range.size(); i != e; ++i)
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LV->addVirtualRegisterKilled(Range[i].second, &MBB, PHICopy);
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}
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RKs = LV->dead_range(MI);
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if (RKs.first != RKs.second) {
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// Works as above...
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Range.assign(RKs.first, RKs.second);
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LV->removeVirtualRegistersDead(RKs.first, RKs.second);
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for (unsigned i = 0, e = Range.size(); i != e; ++i)
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LV->addVirtualRegisterDead(Range[i].second, &MBB, PHICopy);
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}
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}
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// Now loop over all of the incoming arguments, changing them to copy into
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// the IncomingReg register in the corresponding predecessor basic block.
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//
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for (int i = MI->getNumOperands() - 1; i >= 2; i-=2) {
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MachineOperand &opVal = MI->getOperand(i-1);
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// Get the MachineBasicBlock equivalent of the BasicBlock that is the
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// source path the PHI.
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MachineBasicBlock &opBlock = *MI->getOperand(i).getMachineBasicBlock();
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// Figure out where to insert the copy, which is at the end of the
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// predecessor basic block, but before any terminator/branch
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// instructions...
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MachineBasicBlock::iterator I = opBlock.end();
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if (I != opBlock.begin()) { // Handle empty blocks
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--I;
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// must backtrack over ALL the branches in the previous block
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while (MII.isTerminatorInstr(I->getOpcode()) &&
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I != opBlock.begin())
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--I;
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// move back to the first branch instruction so new instructions
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// are inserted right in front of it and not in front of a non-branch
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if (!MII.isTerminatorInstr(I->getOpcode()))
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++I;
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}
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// Check to make sure we haven't already emitted the copy for this block.
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// This can happen because PHI nodes may have multiple entries for the
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// same basic block. It doesn't matter which entry we use though, because
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// all incoming values are guaranteed to be the same for a particular bb.
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//
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// If we emitted a copy for this basic block already, it will be right
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// where we want to insert one now. Just check for a definition of the
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// register we are interested in!
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//
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bool HaveNotEmitted = true;
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if (I != opBlock.begin()) {
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MachineBasicBlock::iterator PrevInst = I;
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--PrevInst;
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for (unsigned i = 0, e = PrevInst->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = PrevInst->getOperand(i);
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if (MO.isRegister() && MO.getReg() == IncomingReg)
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if (MO.isDef()) {
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HaveNotEmitted = false;
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break;
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}
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}
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}
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if (HaveNotEmitted) { // If the copy has not already been emitted, do it.
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assert(MRegisterInfo::isVirtualRegister(opVal.getReg()) &&
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"Machine PHI Operands must all be virtual registers!");
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unsigned SrcReg = opVal.getReg();
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RegInfo->copyRegToReg(opBlock, I, IncomingReg, SrcReg, RC);
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// Now update live variable information if we have it.
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if (LV) {
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// We want to be able to insert a kill of the register if this PHI
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// (aka, the copy we just inserted) is the last use of the source
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// value. Live variable analysis conservatively handles this by
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// saying that the value is live until the end of the block the PHI
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// entry lives in. If the value really is dead at the PHI copy, there
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// will be no successor blocks which have the value live-in.
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//
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// Check to see if the copy is the last use, and if so, update the
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// live variables information so that it knows the copy source
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// instruction kills the incoming value.
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//
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LiveVariables::VarInfo &InRegVI = LV->getVarInfo(SrcReg);
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// Loop over all of the successors of the basic block, checking to see
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// if the value is either live in the block, or if it is killed in the
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// block. Also check to see if this register is in use by another PHI
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// node which has not yet been eliminated. If so, it will be killed
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// at an appropriate point later.
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//
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bool ValueIsLive = false;
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const BasicBlock *BB = opBlock.getBasicBlock();
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for (succ_const_iterator SI = succ_begin(BB), E = succ_end(BB);
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SI != E && !ValueIsLive; ++SI) {
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const std::pair<MachineBasicBlock*, unsigned> &
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SuccInfo = LV->getBasicBlockInfo(*SI);
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// Is it alive in this successor?
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unsigned SuccIdx = SuccInfo.second;
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if (SuccIdx < InRegVI.AliveBlocks.size() &&
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InRegVI.AliveBlocks[SuccIdx]) {
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ValueIsLive = true;
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break;
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}
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// Is it killed in this successor?
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MachineBasicBlock *MBB = SuccInfo.first;
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for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
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if (InRegVI.Kills[i].first == MBB) {
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ValueIsLive = true;
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break;
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}
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// Is it used by any PHI instructions in this block?
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if (ValueIsLive) break;
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// Loop over all of the PHIs in this successor, checking to see if
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// the register is being used...
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for (MachineBasicBlock::iterator BBI = MBB->begin(), E=MBB->end();
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BBI != E && BBI->getOpcode() == TargetInstrInfo::PHI;
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++BBI)
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for (unsigned i = 1, e = BBI->getNumOperands(); i < e; i += 2)
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if (BBI->getOperand(i).getReg() == SrcReg) {
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ValueIsLive = true;
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break;
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}
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}
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// Okay, if we now know that the value is not live out of the block,
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// we can add a kill marker to the copy we inserted saying that it
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// kills the incoming value!
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//
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if (!ValueIsLive) {
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MachineBasicBlock::iterator Prev = I;
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--Prev;
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LV->addVirtualRegisterKilled(SrcReg, &opBlock, Prev);
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}
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}
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}
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}
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// really delete the PHI instruction now!
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delete MI;
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}
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return true;
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}
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} // End llvm namespace
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